Tukwila Update

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This article discusses the last minute changes made to the Tukwila platform, the impact on scheduling and the overall Itanium roadmap.

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ISSCC 2008 Preview: Silverthorne, Rock, Tukwila and More

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This article presents a preview of ISSCC 2008, including discussion of Intel’s Itanium processor, codenamed Tukwila and an ultra-low power x86 MPU codenamed Silverthorne. Other presentations include Sun’s Rock and Niagara 3 processors, the 45nm CELL processor and assorted DRAM and SRAM prsentations.

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AMD’s Griffin Flies to the Fore

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In 2003, AMD bet the company on a server microprocessor, the K8. This turned out to be a wise move, as servers were a key weak point in Intel’s product line-up. The K8 even worked fairly well as a desktop MPU, where the performance could justify the relatively large thermal envelope. Unfortunately, the K8 did nothing to challenge Intel’s dominance of the notebook market. In fact, certain technical decisions which benefited the K8 for servers and desktops in fact hindered adoption into the notebook market.

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Inside Barcelona: AMD’s Next Generation

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In 2002, AMD’s K7 was lagging behind the high frequency 130nm Pentium 4 (Northwood). The 2003 launch of the K8 was a bet-the-company kind of move for AMD. But, by 2005, they had clearly hit the jackpot with the K8 microprocessor. They had three out of four of the major OEMs pitching their server products and Intel’s products barely kept pace in the UP (1 socket) and DP (2 socket) server markets. In the MP (4 socket) server market, AMD was clearly the best choice by a wide margin.

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ISSCC 2007: Intel’s Teraflops Design

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One of Intel’s research areas is what they call “Terascale Computing”. This research is really about discovering how to deal with computer architecture in the next decade or so. One element of this research, a project code-named Polaris, is a chip that delivers over a teraflop of performance. The first silicon prototype of this Teraflops chip was presented at ISSCC 2007 by members of the design team.

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Clovertown Performance Preview: Rise of the Quad Core

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Introduction Since the release of Woodcrest earlier this year, Intel has been resurgent in the dual processor server market. In earlier articles we explored both the performance and power characteristics of Woodcrest, and in each case it was a substantial improvement over the Dempsey microprocessor. More to the point, Woodcrest is clearly a very potent […]

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Fall Processor Forum 2006: IBM’s POWER6

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IBM Previews the POWER6 At the MicroProcessor Forum, Dr. Brad McCredie of IBM continued to tease out particulars regarding the POWER6. The presentation discussed a lot of general microarchitecture features, but did not reveal many specific details; a full revelation of the microarchitecture will likely have to wait till ISSCC, next February. However, from the […]

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Niagara II: The Hydra Returns

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History of Niagara Two years ago at Hot Chips 16, Sun Microsystems disclosed Niagara, an innovative microprocessor and system design that represented a radical departure from traditional computer architectures. The roots of Niagara lie in Hydra, a research project under Professor Kunle Olukotun that was working on chip multiprocessing in the late 1990’s. The Hydra […]

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AMD’s K8L and 4×4 Preview

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News from AMD’s Analyst Day Twice each year, AMD hosts an analyst day. The spring event, which took place at the Sunnyvale headquarters, is more technically oriented and tends to deal with the actual details of the company’s products and technology itself rather than financial performance and metrics. The event itself was relatively low key […]

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Core Microarchitecture Performance: Woodcrest Preview

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Introduction The last several months have been quite interesting for me. I spent most of April in Tanzania, installing computers in several rural schools. While I was in Tanzania, I received an invitation from my friend Scott McLaughlin, to attend another Intel reviewer’s workshop, this time for Woodcrest based systems, in Hillsboro. Rural internet connectivity […]

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