In this article David Wang takes a look at the 45nm shrink of the CELL microprocessor, which was presented at ISSCC 2008. He discusses the design trade-offs made in porting CELL to 45nm and the results achieve in terms of power and die size relative to earlier versions of CELL.
This is the third article in a series covering the CELL microprocessor, co-developed by IBM, Sony and Toshiba.
Why? Details on the CELL processor, designed by the collective efforts of Sony, Toshiba and IBM (STI), were previously disclosed at ISSCC 2005. The previous article provided coverage of the hardware details of the CELL processor, based on the information made available at ISSCC 2005. The purpose of this article is to act as a […]