Making x86 Run Cool

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Low Power Becomes Fashionable

MPU vendors and the trade press have recently started paying much more attention to the class of power efficient x86 microprocessors intended for portable applications. This trend started more than a year ago when Transmeta cleverly repainted a bull’s eye labeled ‘low power’ around the spot where its Crusoe arrow fell short of its x86 competitors in performance. This maneuver was performed so smoothly that hardly a negative word was uttered by the technical press.

Besides achieving x86 compatibility through a unique combination of VLIW hardware and dynamic binary compilation firmware (colorfully termed ‘code morphing’ software), the Crusoe also incorporates advanced power saving features. Not only could it throttle its processor clock according to its level of computing load, it allowed the supply voltage input to the MPU to be reduced as permitted by the lowered clock rate. In general, CMOS digital chips consume power proportional to clock frequency and the square of the power supply voltage. If running the processor at half its maximum clock rate permits the supply voltage to be lowered by 30% then a total power savings of more than 75% can be realized by doing both instead of the 50% reduction realized from slower clocking alone.

Although Transmeta has garnered far more favorable press than actual design wins over the last year, the attention that the mobile x86 processor market received from being suddenly thrust into the spotlight prompted Intel to respond with a comprehensive new mobile processor road map that was unveiled at last October’s Microprocessor Forum. Of special interest was the disclosure that Intel would develop an entirely new IA-32 (x86) microarchitecture specifically for low power, mobile applications. This is a remarkable turnaround for a market segment that was previously addressed with hand-me-down desktop processor designs and speed grades that were no longer competitive in the mainstream market.

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