By: MS (ms.delete@this.lostcircuits.com), January 21, 2011 5:09 pm
Room: Moderated Discussions
David Kanter (dkanter@realworldtech.com) on 1/20/11 wrote:
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>
>Thanks for checking on that. I think either way, we've come to the same conclusion
>- the L2 clearly transfer 32B/cycle, although in realistic situations, it achieves somewhat less.
>
>I'm still puzzled that the stream perf for L1 and L2 are so close...but that's fine.
>
>DK
I just got an email from Intel engineering pointing out that the access path for the L2 in Nehalem and SB is indeed 256 bits wide.
---------------------------
>
>Thanks for checking on that. I think either way, we've come to the same conclusion
>- the L2 clearly transfer 32B/cycle, although in realistic situations, it achieves somewhat less.
>
>I'm still puzzled that the stream perf for L1 and L2 are so close...but that's fine.
>
>DK
I just got an email from Intel engineering pointing out that the access path for the L2 in Nehalem and SB is indeed 256 bits wide.
