By: anonymous (no.delete@this.email.org), January 16, 2011 1:59 pm
Room: Moderated Discussions
Mark Roulo (nothanks@xxx.com) on 1/16/11 wrote:
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>Do these things have both a 2MB L2 per module and 2MB of L3 per module?
AFAIK, the L3 is shared between modules. 8 megabytes of SRAM consist of ~400M transistors. If the L3 was included into the modules, the entire 852 M transistors would be used by the 4*(2+2)M cache.
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>Do these things have both a 2MB L2 per module and 2MB of L3 per module?
AFAIK, the L3 is shared between modules. 8 megabytes of SRAM consist of ~400M transistors. If the L3 was included into the modules, the entire 852 M transistors would be used by the 4*(2+2)M cache.
