An addendum on I/O

David Kanter (dkanter@realworldtech.com) on 1/27/12 wrote:
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>Phil (phil@phil.com) on 1/27/12 wrote:
>---------------------------
>>David Kanter (dkanter@realworldtech.com) on 9/28/11 wrote:
>>---------------------------
>>>David Kanter (dkanter@realworldtech.com) on 9/28/11 wrote:
>>>---------------------------
>>>>>Clearly both IBM and Oracle will use the fastest systems and storage to run any
>>>>>benchmark, otherwise why run it?
>>>>
>>>>Optimize for cost? Maybe they don't want to spend too much money on benchmarking? Who knows.
>>>>
>>>>> Benchmarks are for showing fastest possible configurations.
>>>>>Why would IBM run a fast CPU with slow storage after all? If the IBM result doesn’t
>>>>>use flash, its because either IBM doesn’t offer it or it doesn’t work well for them
>>>>>on the benchmark.
>>>>
>>>>Or they don't want to invest in benchmarking an older platform?
>>>>
>>>>>Plus, I believe, now that Oracle has come out with a 2x+ >>>>>result than Power7, IBM can clearly come back with a >faster result-NO? Only time
>>>>>will tell, but until then, SPARC T4 is the new leader in >performance, and even performance/core!
>>>>
>>>>Seriously, are you trolling? Or do you just work for Oracle's marketing department?
>>>>
>>>>On what planet could you possibly believe that the T4 has better performance than the POWER7?
>>>>
>>>>Let's think about this:
>>>>
>>>>1. Both are 8 cores.
>>>>2. The POWER7 is 5 or 6 wide, with 2 LSUs, the T4 is 2-wide with 1 LSU.
>>>>3. The POWER7 has 4 threads/core, the T4 has 8 threads/core.
>>>>4. The POWER7 is ~4GHz, the T4 is ~3GHz.
>>>>5. The POWER7 has 32MB L3 cache, the T4 has 4MB.
>>>>6. The POWER7 has 153GB/s of memory bandwidth, the T4 has ~83GB/s.
>>>>
>>>>There is no performance metric on which the T4 could >conceivably beat the POWER7.
>>>
>>
>>While on paper, the Power7 specs appear to be higher, that doesn’t seem to be translating
>>to a faster system for OLTP/Datawarehouse or running middleware SW. After all, the
>>OS, Storage, I/O interfaces and SW technologies all have a part in *delivered system
>>performance*. So while the SPARC T4 doesn’t have the same specs as listed above,
>>you can't deny that today, the SPARC T4 has several higher >performance benchmarks than Power7.
>
>I totally agree that OS, storage, I/O and SW all have a major role in system performance.
>For at least some of those dimensions (e.g. I/O) it is possible to make direct comparisons.
>Others are not currently possible.
>
>But most of the benchmarks out there are non-comparable. They are clusters of dramatically
>different size with dramatically different DMBSes.
>
>There's also a scalability factor. You can build 16-32S POWER7 systems, whereas
>the T4 is limited to 4-sockets as I recall.
>
>>If the Power7 is so superior to SPARC T4, why are there no >benchmarks available
>>that prove this? Its been 3 months since the SPARC T4 was >launched and surely IBM
>>would be responding? Or is it that they are waiting for >Power7+ to arrive to release some results?
>
>Perhaps IBM doesn't feel the need to have the highest score? The absence of a better
>benchmark score from a competitor does not always imply that the competitors products will yield lower benchmark scores.
>
>Look, you can calculate the tpmc/core for the T3 cluster and it turns out to be
>17.5K. Based on Sun's presentations, each S4 core is about 2X the performance of
>a T3 core for 'multithreaded databases'. So I think it's safe to assume that the
>S3 core will score around 35K, but lets be generous and say 40K.
>
>If you compare that to the Power780, the number is 53.9K tpmc/core. And that's
>a 3.8GHz SKU. A 4GHz SKU should be more like 55K. I'd also point out that the IBM
>submission is about 9 months older, so there may be even higher scores due to software tuning.
>
>Both the 40nm T4 and 32nm POWER8 are 8-core chips, as is the upcoming 32nm SNB-EP
>and 32nm Poulson. It should be quite interesting to see how they all compare, especially
>when the 28nm shrink of the T4 comes out (although that may be 16 cores).
>

Power8 is going to be 8-core and 32nm? That would seem to conflict with the public roadmaps so far, unless you mean Power7+.

>David