Article: Haswell TM Alternatives

Article: Haswell Transactional Memory Alternatives
By: David Kanter (dkanter.delete@this.realworldtech.com), August 22, 2012 1:06 am
Room: Moderated Discussions
Håkan Winbom (hakan.winbom.delete@this.gmail.com) on August 22, 2012 12:52 am wrote:
> David Kanter (dkanter.delete@this.realworldtech.com) on August 21, 2012 10:17 pm
> wrote:
> > We previously theorized that Intel’s TSX extensions in Haswell
> use the caches
> > to provide transactional memory semantics. This article
> describes an alternative
> > approach based on minimal changes to the CPU core
> (specifically in the ROB and
> > MOB), contrasts the advantages of the two
> techniques and discusses the expected
> > implementation in Haswell.
> >
>
> > http://www.realworldtech.com/haswell-tm-alt/
> >
> > I
> > also
> muse a bit about when these two techniques (cache-based and MOB-based TM)
> >
> will get implemented on the roadmap and how they can work together in a very
>
> > complimentary fashion.
> >
> > As always comments and discussion
> welcome.
> >
> > David
>
> I would really like a a high level use case
> description of transactional memory.
> Do you have any good reference? Or is that
> an entirely new article?
> /HW

There are a large number of use cases. To start with, Azul's JVM used a minimal form of TM to improve garbage collection.

http://research.microsoft.com/en-us/um/people/tharris/papers/2009-ics.pdf

Hardware Lock Elision is also quite useful for handling code with locks. For example, AMD did some excellent research showing considerable benefits for memcached:

http://www.cs.purdue.edu/transact11/web/papers/Pohlack.pdf

David
< Previous Post in ThreadNext Post in Thread >
TopicPosted ByDate
Article: Haswell TM AlternativesDavid Kanter08/21/12 09:17 PM
  Article: Haswell TM AlternativesHåkan Winbom08/21/12 11:52 PM
    Article: Haswell TM AlternativesDavid Kanter08/22/12 01:06 AM
  Article: Haswell TM Alternativesanon08/22/12 08:46 AM
    Article: Haswell TM AlternativesLinus Torvalds08/22/12 09:16 AM
      Article: Haswell TM AlternativesDoug S08/24/12 08:34 AM
    AMD's ASF even more limitedPaul A. Clayton08/22/12 09:20 AM
      AMD's ASF even more limitedLinus Torvalds08/22/12 09:41 AM
        Compiler use of ll/sc?Paul A. Clayton08/28/12 09:28 AM
          Compiler use of ll/sc?Linus Torvalds09/08/12 12:58 PM
            Lock recognition?Paul A. Clayton09/10/12 01:17 PM
              Sorry, I was confusedPaul A. Clayton09/13/12 10:56 AM
  Filter to detect store conflictsPaul A. Clayton08/22/12 09:19 AM
  Article: Haswell TM Alternativesbakaneko08/22/12 02:02 PM
    Article: Haswell TM AlternativesDavid Kanter08/22/12 02:45 PM
      Article: Haswell TM Alternativesbakaneko08/22/12 09:56 PM
  Cache line granularity?Paul A. Clayton08/28/12 09:28 AM
    Cache line granularity?David Kanter08/31/12 08:13 AM
      A looser definition might have advantagesPaul A. Clayton09/01/12 06:29 AM
    Cache line granularity?rwessel08/31/12 07:54 PM
      Alpha load locked granularityPaul A. Clayton09/01/12 06:29 AM
        Alpha load locked granularityanon09/02/12 05:23 PM
          Alpha pages groupsPaul A. Clayton09/03/12 04:16 AM
  An alternative implementationMaynard Handley11/20/12 09:52 PM
    An alternative implementationbakaneko11/21/12 05:52 AM
      Guarding unread values?Paul A. Clayton11/21/12 08:39 AM
        Guarding unread values?bakaneko11/21/12 11:25 AM
    TM granularity and versioningPaul A. Clayton11/21/12 08:27 AM
      TM granularity and versioningMaynard Handley11/21/12 10:52 AM
        Indeed, TM (and coherence) has devilish details (NT)Paul A. Clayton11/21/12 10:56 AM
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