Compiler use of ll/sc?

Article: Haswell Transactional Memory Alternatives
By: Paul A. Clayton (paaronclayton.delete@this.gmail.com), August 28, 2012 10:28 am
Room: Moderated Discussions
Linus Torvalds (torvalds.delete@this.linux-foundation.org) on August 22, 2012 10:41 am wrote:
[snip]
> More importantly, even if ll/sc could work in some particular
> case, realistically people wouldn't actually use ll/sc,
> because it's basically impossible to do portably, and it's
> not generally amenable to the compiler doing it
> automatically. In contrast, lock elision with small
> transactions is amenable to doing
> automatically from portable source code.

How can a compiler recognize a locked critical section and not be able to recognize at least most of the possible uses of ll/sc? Recognizing a sequence that only loads one value from memory, performs some computation, then replaces the value with a new value (and that being the only store operation and--at least for most ISAs--the only memory operations allowed are the ll/sc [IIRC, Alpha also failed sc on a taken branch.])

ll/sc is such a limited form of transactional memory that recognizing most possible uses would seem not to be too difficult.

Intel's HLE is very nice in allowing older hardware to run binaries with the new instructions. (Avoiding an alternative path--as necessary anyway for compatibility--also likely simplifies software development.) In theory, all future x86 implementations could support RTM, where a minimal implementation simply sets eax to indicate that this transaction will always fail and jumps to the fall-back path.

(An ISA could provide TM support by requiring the result register to be preset with an always-fail result and placing a branch--or a jump--to the alternative path immediately after the instruction that begins the transaction [which instruction would use a nop encoding]. The transaction beginning instruction would skip over the branch and on failure return to the branch instruction [though it could just store the target address]. On hardware that did not support transactions, the branch would be encountered and control would always follow the alternative path. If the ISA had an otherwise unused encoding for setting the result register to the always fail value, it might be safe to use such to being the transaction [The only problem would be that old software might accidentally trigger. A set result register to 1 followed by a branch not equal to zero might be usable as an unconditional jump is more likely to be used by older software {unless there is a path that jumps to the branch instruction}.]. I suspect that using a special transaction beginning instruction would be more desirable.)
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TopicPosted ByDate
Article: Haswell TM AlternativesDavid Kanter08/21/12 10:17 PM
  Article: Haswell TM AlternativesHåkan Winbom08/22/12 12:52 AM
    Article: Haswell TM AlternativesDavid Kanter08/22/12 02:06 AM
  Article: Haswell TM Alternativesanon08/22/12 09:46 AM
    Article: Haswell TM AlternativesLinus Torvalds08/22/12 10:16 AM
      Article: Haswell TM AlternativesDoug S08/24/12 09:34 AM
    AMD's ASF even more limitedPaul A. Clayton08/22/12 10:20 AM
      AMD's ASF even more limitedLinus Torvalds08/22/12 10:41 AM
        Compiler use of ll/sc?Paul A. Clayton08/28/12 10:28 AM
          Compiler use of ll/sc?Linus Torvalds09/08/12 01:58 PM
            Lock recognition?Paul A. Clayton09/10/12 02:17 PM
              Sorry, I was confusedPaul A. Clayton09/13/12 11:56 AM
  Filter to detect store conflictsPaul A. Clayton08/22/12 10:19 AM
  Article: Haswell TM Alternativesbakaneko08/22/12 03:02 PM
    Article: Haswell TM AlternativesDavid Kanter08/22/12 03:45 PM
      Article: Haswell TM Alternativesbakaneko08/22/12 10:56 PM
  Cache line granularity?Paul A. Clayton08/28/12 10:28 AM
    Cache line granularity?David Kanter08/31/12 09:13 AM
      A looser definition might have advantagesPaul A. Clayton09/01/12 07:29 AM
    Cache line granularity?rwessel08/31/12 08:54 PM
      Alpha load locked granularityPaul A. Clayton09/01/12 07:29 AM
        Alpha load locked granularityanon09/02/12 06:23 PM
          Alpha pages groupsPaul A. Clayton09/03/12 05:16 AM
  An alternative implementationMaynard Handley11/20/12 10:52 PM
    An alternative implementationbakaneko11/21/12 06:52 AM
      Guarding unread values?Paul A. Clayton11/21/12 09:39 AM
        Guarding unread values?bakaneko11/21/12 12:25 PM
    TM granularity and versioningPaul A. Clayton11/21/12 09:27 AM
      TM granularity and versioningMaynard Handley11/21/12 11:52 AM
        Indeed, TM (and coherence) has devilish details (NT)Paul A. Clayton11/21/12 11:56 AM
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