Higher SRAM voltage and shared L1

Article: Intel's Near-Threshold Voltage Computing and Applications
By: somebody (delete.sombody.delete@this.somebody.com), September 19, 2012 9:27 am
Room: Moderated Discussions
Paul A. Clayton (paaronclayton.delete@this.gmail.com) on September 18, 2012 2:38 pm wrote:
> The statement about power variability reminded me of POWER7's use of its deep
> trench capacitors to stabilize voltage.
>
> This brings me to ask if anyone here
> can comment on an idea I presented some time ago on comp.arch for
> micro-turboboost using capacitors to locally (temporally and spatially)
> accelerate a computation under exceptional conditions. (The example of an
> exceptional condition I gave was a carry misprediction, but more realistic
> examples might exist.) My comp.arch post received no replies and almost two
> weeks ago (5 September) I sent an email to someone at IBM research (in
> desperation or insane hope) asking about this but have not yet received a
> reply.
>

The power coming to the processor has to be distributed vertically (board, package, C4s) and then on-chip laterally (BEOL upper layer metal power grid) to the logic circuits.

While the former is reasonably low Ohmic, it's inductive part is sizable; the latter has reasonably good inductive characteristics, however it's Ohmic part is not to neglect.

It is not to underestimate what supply ripples the combination of the two effects above cause in circuits with substantial load variation. My guesstimate is that 100+mV supply ripple is eating in an e.g. 1V supply budget - maybe even more (perhaps somebody has a literature reference on that). This means that the timing has to close at 0.9V (as well as 1.1V), even though the average power is consumed from 1V. So you get the clock frequency of 0.9V, but the power from 1V.
Rem: This is for 'normal' power CPUs (100+W), the situation looks probably much better for the 2mW or so the low-voltage Pentium is consuming. However, 50mW ripple on a 250mV supply also would hurt a lot...

Having more decoupling on the chip can reduce supply ripple considerably, at the cost of area obviously. If one has the 'luxury' to leverage dense deep trench caps, the area penalty seems to be OK to be accepted (judged from the fact that the Power7 folks decided to use it).

With respect to your idea to use capacitors spatially and temporally to handle peaks, the parasitic resistance of your lateral power distribution comes into your way: Decoupling is of no good use if not close enough to where you need it => Dynamic spatial allocation does not solve the problem. If the decoupling is close, it's there anyway occupying the area => The dynamic temporal allocation is void.

As a side remark: On-chip power conversion seems to come to fashion for many reasons, one being power supply stabilization (in the sense of what I would call 'electronic decoupling'). See e.g. here http://www1.eere.energy.gov/manufacturing/datacenters/pdfs/integrated_conversion.pdf
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New article: Intel's Near-Threshold ComputingDavid Kanter09/18/12 12:26 PM
  Higher SRAM voltage and shared L1Paul A. Clayton09/18/12 02:38 PM
    Higher SRAM voltage and shared L1David Kanter09/18/12 05:20 PM
      Higher SRAM voltage and shared L1Eric09/20/12 10:44 AM
        Higher SRAM voltage and shared L1David Kanter09/20/12 12:24 PM
      Yes, that kind of asynchronousPaul A. Clayton09/20/12 02:53 PM
    Higher SRAM voltage and shared L1somebody09/19/12 09:27 AM
      So micro-turboboost is doubly impracticalPaul A. Clayton09/20/12 02:53 PM
  Big littleDoug S09/18/12 03:04 PM
    Big littleDavid Kanter09/18/12 04:05 PM
    Big littleRicardo B09/19/12 04:06 AM
  New article: Intel's Near-Threshold Computingdefderdar09/18/12 09:39 PM
    New article: Intel's Near-Threshold Computingtarlinian09/19/12 08:32 AM
      New article: Intel's Near-Threshold ComputingDavid Kanter09/19/12 10:44 AM
  New article: Intel's Near-Threshold ComputingMark Christiansen09/19/12 11:31 AM
    New article: Intel's Near-Threshold ComputingChris Brodersen09/19/12 12:54 PM
  New article: Intel's Near-Threshold ComputingEric09/20/12 10:47 AM
  Latency and HPC WorkloadsRobert Myers10/03/12 10:52 AM
    Latency and HPC Workloadsanon10/03/12 06:50 PM
      Latency and HPC WorkloadsRobert Myers10/04/12 10:24 AM
        Latency and HPC WorkloadsSHK10/08/12 05:42 AM
          Latency and HPC WorkloadsMichael S10/08/12 01:59 PM
            Latency and HPC WorkloadsSHK10/08/12 02:42 PM
              Latency and HPC WorkloadsMichael S10/08/12 05:12 PM
                Latency and HPC Workloadsforestlaughing10/15/12 08:41 AM
                  The original context was Micron RLDRAM (NT)Michael S10/15/12 08:55 AM
                    The original context was Micron RLDRAMforestlaughing10/15/12 10:21 AM
              Latency and HPC Workloads - Why not SRAM?Kevin G10/09/12 09:48 AM
                Latency and HPC Workloads - Why not SRAM?Michael S10/09/12 10:33 AM
                  Latency and HPC Workloads - Why not SRAM?SHK10/09/12 12:55 PM
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                  Latency and HPC Workloads - Why not SRAM?Kevin G10/09/12 03:04 PM
                    Latency and HPC Workloads - Why not SRAM?Michael S10/09/12 04:52 PM
                      Latency and HPC Workloads - Why not SRAM?Robert Myers10/10/12 10:11 AM
                        Latency and HPC Workloads - Why not SRAM?forestlaughing10/15/12 08:02 AM
                          Latency and HPC Workloads - Why not SRAM?Robert Myers10/15/12 09:04 AM
                            Latency and HPC Workloads - Why not SRAM?forestlaughing10/16/12 09:13 AM
                          Latency and HPC Workloads - Why not SRAM?SHK10/16/12 08:12 AM
                    Latency and HPC Workloads - Why not SRAM?slacker10/11/12 01:35 PM
                      SRAM leakageDavid Kanter10/11/12 03:00 PM
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                Latency and HPC WorkloadsRobert Myers10/16/12 09:56 AM
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                        Supercomputer variant of Kahan quoteMichael S10/17/12 06:56 PM
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                                Supercomputer variant of Kahan quoteRobert Myers10/19/12 07:04 PM
                                  Supercomputer variant of Kahan quoteEmil Briggs10/20/12 04:52 AM
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                                      Supercomputer variant of Kahan quoteEmil Briggs10/20/12 08:33 AM
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                                            Supercomputer variant of Kahan quoteEmil Briggs10/20/12 10:04 AM
                                              Supercomputer variant of Kahan quoteRobert Myers10/20/12 11:23 AM
                  Latency and HPC Workloadsanon10/16/12 06:48 PM
                    Latency and HPC Workloadsforestlaughing10/19/12 11:43 AM
              Latency and HPC Workloadsforestlaughing10/19/12 09:38 AM
                Latency and HPC WorkloadsRobert Myers10/19/12 11:40 AM
                Potential false economics in researchPaul A. Clayton10/19/12 12:54 PM
                  Potential false economics in researchVincent Diepeveen10/20/12 08:59 AM
                  Potential false economics in researchforestlaughing10/23/12 10:56 AM
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