The original context was Micron RLDRAM

Article: Intel's Near-Threshold Voltage Computing and Applications
By: forestlaughing (forestlaughing.delete@this.yahoo.com), October 15, 2012 10:21 am
Room: Moderated Discussions
Michael S (already5chosen.delete@this.yahoo.com) on October 15, 2012 8:55 am wrote:
> The original context was Micron RLDRAM

Well, I think the cost issue remains true. Capacity is just too low for most users of the power architecture, so IBM isn't going to go all-in on RLDRAM. Ideally, one would have a memory interface that could accept either type of memory, letting the user chose whether latency or capacity are most important, though it sounds like RLDRAM is different enough from SDRAM that such isn't possible.

For what it's worth, IBM's L3 cache is Dram, not SRAM. I think low latency memories have a chance if they help the common case user, which caches, and the like, generally do.
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New article: Intel's Near-Threshold ComputingDavid Kanter09/18/12 12:26 PM
  Higher SRAM voltage and shared L1Paul A. Clayton09/18/12 02:38 PM
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      So micro-turboboost is doubly impracticalPaul A. Clayton09/20/12 02:53 PM
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        Latency and HPC WorkloadsSHK10/08/12 05:42 AM
          Latency and HPC WorkloadsMichael S10/08/12 01:59 PM
            Latency and HPC WorkloadsSHK10/08/12 02:42 PM
              Latency and HPC WorkloadsMichael S10/08/12 05:12 PM
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                  The original context was Micron RLDRAM (NT)Michael S10/15/12 08:55 AM
                    The original context was Micron RLDRAMforestlaughing10/15/12 10:21 AM
              Latency and HPC Workloads - Why not SRAM?Kevin G10/09/12 09:48 AM
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                        Latency and HPC Workloads - Why not SRAM?forestlaughing10/15/12 08:02 AM
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                            Latency and HPC Workloads - Why not SRAM?forestlaughing10/16/12 09:13 AM
                          Latency and HPC Workloads - Why not SRAM?SHK10/16/12 08:12 AM
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                    Latency and HPC Workloadsforestlaughing10/19/12 11:43 AM
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