Move elimination can be a µop fusion

Article: Intel's Haswell CPU Microarchitecture
By: anon (anon.delete@this.anon.com), November 14, 2012 7:25 am
Room: Moderated Discussions
Paul A. Clayton (paaronclayton.delete@this.gmail.com) on November 14, 2012 6:41 am wrote:
> anon (anon.delete@this.anon.com) on November 14, 2012 5:10 am wrote:
> [snip]
> > When it is said that the front-end handles simple reg,reg moves
> > and saves OOOE resources, what does this mean exactly?
> >
> > Presumably such instruction has to be at least tracked in the ROB somehow. So it may save a physical
> > register and an execution unit, but it's not entirely eliminated from OOOE part. Or am I way off base?
>
> A move that occurs immediately before an instruction which uses the destination of the move
> as a source/destination can effectively be fused with the later instruction. E.g.:
>
> mov R9 add R10
> can be transformed into:
>
> add R10
> which could occupy a single ROB entry. (Note that each instruction need not maintain a unique
> ROB entry; ISTR that POWER4 hold up to four instructions plus a branch in each ROB entry.)
>
> Unrestricted move elimination would be more complex. However, even if such requires a ROB entry, it removes
> the move from the dependence chain--zero-cycle move--(as well as saving a register, temporary use of a scheduler
> slot, execution unit use, and possibly register file reads). Avoiding execution saves power, of course.

Certainly, but in that case you could not exactly say it has avoided the OOOE engine, as you can with the above case.
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Haswell CPU article onlineDavid Kanter11/13/12 03:43 PM
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    LLC == Last Level Cache (usually L3) (NT)Paul A. Clayton11/14/12 05:50 AM
    Haswell CPU article onlineJoe11/14/12 10:38 AM
      LLC vs. L3 vs. L4David Kanter11/14/12 11:09 AM
        LLC vs. L3 vs. L4; LLC = Link Layer ControllerRay11/14/12 10:08 PM
          A pit there are only 17000 TLAs... (NT)EduardoS11/15/12 03:14 AM
  Haswell CPU article onlineanon11/14/12 05:10 AM
    Move elimination can be a µop fusionPaul A. Clayton11/14/12 06:41 AM
      That should be "mov R10 <- R9"! (NT)Paul A. Clayton11/14/12 06:43 AM
      Move elimination can be a µop fusionanon11/14/12 07:25 AM
        It does avoid the scheduler (NT)Paul A. Clayton11/14/12 08:47 AM
      Move elimination can be a µop fusionStubabe11/14/12 01:43 PM
        Move elimination can be a µop fusionanon11/14/12 09:33 PM
          Move elimination can be a µop fusionFelid11/15/12 12:49 AM
            Move elimination can be a µop fusionanon11/15/12 01:23 AM
              Move elimination can be a µop fusionStuart11/15/12 05:04 AM
                Move elimination can be a µop fusionStubabe11/15/12 05:14 AM
                  Move elimination can be a µop fusionanon11/15/12 05:48 AM
                    Move elimination can be a µop fusionEduardoS11/15/12 06:00 AM
                      Move elimination can be a µop fusionanon11/15/12 06:14 AM
                        Move elimination can be a µop fusionEduardoS11/15/12 06:21 AM
                          Move elimination can be a µop fusionanon11/15/12 06:31 AM
                    Move elimination can be a µop fusionStubabe11/15/12 11:38 AM
                      There can be only one dependencePaul A. Clayton11/15/12 12:50 PM
                    Move elimination can be a µop fusionFelid11/15/12 03:19 PM
                      Move elimination can be a µop fusionanon11/16/12 04:07 AM
                        Move elimination can be a µop fusionFelid11/16/12 07:43 PM
                  Move elimination can be a µop fusionFelid11/15/12 02:50 PM
                    Move elimination can be a µop fusionFelid11/15/12 03:03 PM
                      Correction!Felid11/19/12 01:23 AM
                    Thanks, I wasn't aware of the change in SB. Good to know... (NT)Stubabe11/15/12 03:43 PM
            Move fusion assumes adjacencyPaul A. Clayton11/15/12 07:15 AM
              Move fusion assumes adjacencyFelid11/15/12 02:40 PM
        Move elimination can be a µop fusionPatrick Chase11/21/12 11:52 AM
          Move elimination can be a µop fusionPatrick Chase11/21/12 12:12 PM
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                128-bit division unit?Michael S11/17/12 02:45 PM
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  Haswell CPU article onlineMr. Camel11/28/12 03:47 PM
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              Much faster iGPU clock ...Exophase12/12/12 11:46 PM
                Much faster iGPU clock ... or not :-)Mark Roulo12/13/12 09:11 AM
                  Much faster iGPU clock ... or not :-)EduardoS12/13/12 10:38 PM
                    Much faster iGPU clock ... or not :-)Michael S12/14/12 05:33 AM
                      Much faster iGPU clock ... or not :-)EduardoS12/14/12 07:06 AM
                        Much faster iGPU clock ... or not :-)Doug S12/14/12 12:13 PM
                          Much faster iGPU clock ... or not :-)EduardoS12/14/12 12:43 PM
                  Much faster iGPU clock ... or not :-)Mr. Camel12/14/12 10:50 AM
              Much faster iGPU clock ...Michael S12/13/12 02:44 AM
                Much faster iGPU clock ...Mark Roulo12/13/12 09:09 AM
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      Great postDavid Kanter09/01/14 07:12 PM
      Thanks :)Alberto09/02/14 01:42 AM
      Thanks (NT)Poindexter09/02/14 09:31 AM
    Haswell CPU article onlineEduardoS09/01/14 04:21 PM
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