By: Patrick Chase (no.delete@this.spam-please.com), November 21, 2012 12:12 pm
Room: Moderated Discussions
Patrick Chase (no.delete@this.spam-please.com) on November 21, 2012 11:52 am wrote:
> Recall that the entire point of having an ROB is to enable
> precise exceptions, so "hiding" operations from the ROB is done at one's own peril.
Clarifying a bit since this comment might seem foreign to people who've only dealt with OoO machines that have ROBs: Tomasulo's algorithm as implemented in the IBM 360/91 (all the way back in the late 60s) implements out-of-order execution without a ROB, and without precise exceptions.
If you didn't need precise exceptions then you could use a basic Tombasulo machine, perhaps replacing the reservation stations and common results bus with schedulers and a physical register file if you wanted to save some power. Tombasulo ensures that all instructions will commit in *dependency* order, so in an exception-free run the fact that they don't commit in *program* order is irrelevant (assuming that any memory-ordering requirements are represented by corresponding inter-instruction dependencies). It only matters when something goes wrong...
-- Patrick
> Recall that the entire point of having an ROB is to enable
> precise exceptions, so "hiding" operations from the ROB is done at one's own peril.
Clarifying a bit since this comment might seem foreign to people who've only dealt with OoO machines that have ROBs: Tomasulo's algorithm as implemented in the IBM 360/91 (all the way back in the late 60s) implements out-of-order execution without a ROB, and without precise exceptions.
If you didn't need precise exceptions then you could use a basic Tombasulo machine, perhaps replacing the reservation stations and common results bus with schedulers and a physical register file if you wanted to save some power. Tombasulo ensures that all instructions will commit in *dependency* order, so in an exception-free run the fact that they don't commit in *program* order is irrelevant (assuming that any memory-ordering requirements are represented by corresponding inter-instruction dependencies). It only matters when something goes wrong...
-- Patrick
