ARMv8 getting atomic operations

By: Linus Torvalds (torvalds.delete@this.linux-foundation.org), December 3, 2014 11:15 am
Room: Moderated Discussions
Andreas (kingmouf.delete@this.gmail.com) on December 3, 2014 6:51 am wrote:
>
> I think that we should realize that the world does not spin only around iDevices and Apple. In my point
> of view this is more geared towards larger systems and servers rather than tablets and phones.

Yes. From what I've seen, the advantage of atomic RMW ops is under heavy contention, when they are better at making progress than the equivalent "read/op/cmpxchg" loop.

Obviously, I can compare mainly against x86, since that is the only other relevant architecture that has RMW operations. And x86 doesn't have the whole "load-linked" and "store-conditional" model (ARMv8 calls it "load/store exclusive"), so that read/op/cmpxchg is the closest semi-equivalent sequence.

I'm personally a fan of RMW instructions due to the guaranteed progress and the whole potential cache coherency protocol advantage (no need for write intent hints etc). So it makes sense to me.

Of course, there might be a code density issue driving this too. It is not unreasonable to have reference count updates etc that you want to inline in JIT'ed code, and the whole "loop over load-locked/add/store-conditional" model is just damn painful for that. So there might certainly be reasons to do the atomics even in small devices.

Which makes me wonder: the docs say that the instructions "also include controls associated with influencing the order properties" (good - the memory ordering requirement for an atomic that gets a reference count can be very different from the memory ordering of an atomic that just increments some statistics), but there are cases where you don't even care about SMP atomicity, you just want atomicity wrt interrupts or even just smaller code.

So I wonder if the "order properties" include that kind of "UP-only interrupt atomicity" ordering that isn't even SMP-safe but is potentially cheaper..

Linus
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ARMv8 getting atomic operationsdmcq12/02/14 05:32 PM
  ARMv8 getting atomic operationsMaynard Handley12/02/14 07:33 PM
    ARMv8 getting atomic operationsDoug S12/02/14 10:30 PM
      ARMv8 getting atomic operationsdmcq12/03/14 03:16 AM
      ARMv8 getting atomic operationsMaynard Handley12/03/14 09:20 AM
      ARMv8 getting atomic operationsBrett12/03/14 04:46 PM
    ARMv8 getting atomic operationsAndreas12/03/14 06:51 AM
      ARMv8 getting atomic operationsLinus Torvalds12/03/14 11:15 AM
        ARMv8 getting atomic operationsanon12/03/14 05:08 PM
          Guaranteed transactionsPaul A. Clayton12/03/14 08:04 PM
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                                                              Manycores vs multicoresjuanrga01/10/15 04:10 PM
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                                                                      Manycores vs multicoresjuanrga01/10/15 08:21 PM
                                                                        Manycores vs multicoresExophase01/10/15 08:51 PM
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                                                                    Manycores vs multicoresAaron Spink01/10/15 07:21 PM
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                                                                            Manycores vs multicorescoppice01/12/15 10:01 PM
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                                                                        Manycores vs multicoresanon01/11/15 03:19 AM
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                                                              Intentionally picking a competitors slow part is cheating ...Anon01/10/15 02:00 AM
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                      ISA != interface for "most programmers"rwessel12/04/14 07:50 PM
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          ARMv8 getting atomic operationsLinus Torvalds12/04/14 12:05 PM
            LL/SC idiom recognition is not admitting RMW superiorityPaul A. Clayton12/04/14 02:34 PM
            ARMv8 getting atomic operationsanon12/04/14 10:17 PM
    ARMv8 getting atomic operationsPatrick Chase12/03/14 12:09 PM
  limited ordernksingh12/04/14 10:17 PM
    I didn't understand this either. (NT)Konrad Schwarz12/04/14 10:32 PM
    limited orderdmcq12/05/14 02:13 AM
    limited orderbakaneko12/05/14 09:11 AM
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