lmbench is horribly broken

By: bakaneko (nyan.delete@this.hyan.wan), March 18, 2017 11:17 am
Room: Moderated Discussions
Ireland (boh.delete@this.outlook.ie) on March 17, 2017 7:37 pm wrote:
> Linus Torvalds (torvalds.delete@this.linux-foundation.org) on March 17, 2017 6:43 pm wrote:
> >
> > I think everybody agrees that that would be completely insane. The fact is, memory
> > latency includes the time to probe the caches, because that time is something you
> > have to pay, and it's one of the costs of having caches in the first place.
> >
> > And for exactly tyhe same reason, memory latency should include an approximation of the time it
> > takes to fill the TLB - it's just a fundamental part of the real cost of accessing memory.
> >
> > So if your TLB's are slow to fill, that damn well should show up in that number, instead
> > of trying to hide it by forcing the accesses to be dense in the TLB, and making your benchmark
> > do some unrealistic code that nobody ever does just to hide the TLB costs.
> >
>
> I've learned a lot about page tables and caches, with reading of all the overhead.
>
> They work on this same concept I think, in mechanical designs, when dealing with fluids. The insert what are
> known as 'buffer tanks', because designers have recognized that at times of 'peak' load on the system (for
> example, morning time, hot water supply in a hotel for 'x' number of guests), that the system has to be able
> to respond to this increase in demand, without having to 'oversize' all parts of the system. Which for the
> most of the remainder of the time, would be wasted capacity if one designed around that equation.
>
> Now, what's taken into account also, in designing the buffers, is they're approximate rate of 'refill', or 'recharge'.
> I.e. In the hotel and guests example, there's a sub-system, that is used to heat up water. I.e. The quicker
> that turn around, on the re-heat and re-fill, the less outlandish that one's buffers have to become too. Because
> again, like the problem with the over-sized water supply system, over-sized buffers can cause issues too. There's
> different levels within the solution. I don't know exactly, how to re-state it in terms of the software problem,
> the high-performance computing problem, but I think that engineers are familiar with the systems issue, in a
> lot of different contexts, when it's broken down to the basic principles. No?

It's quite the opposite actually. Assuming that caches are a simple engineering problem is the worst way too look at it, because it misses a whole dimension of the problem engineers don't deal with because they work with replaceable standardized parts.

Caches are a complex organisation problems and much closer to what office workers have to do in a paper based office.

Every document is unique and is in an unique place and needs to go to another unique place and people need to cooperate to not make a mess while being fast enough. And obviously some office workers need multiple documents at the same time and then we are already at the software side of problems with deadlocks.

How big you make caches and how you connect them is trivial compared to this.
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TopicPosted ByDate
ARM A73 benchmarksSymmetry03/14/17 06:24 AM
  ARM A73 benchmarksPer Hesselgren03/14/17 07:18 AM
    ARM A73 benchmarks-latencyPer Hesselgren03/14/17 08:58 AM
      ARM A73 benchmarks-latencySymmetry03/14/17 10:12 AM
        ARM A73 benchmarks-latencyPer Hesselgren03/14/17 03:54 PM
          ARM A73 benchmarks-latencyWilco03/15/17 01:45 AM
            ARM A73 benchmarks-latencyPer Hesselgren03/15/17 02:57 AM
              ARM A73 benchmarks-latencyPer Hesselgren03/15/17 03:00 AM
                ARM A73 benchmarks-latencyPer Hesselgren03/15/17 03:01 AM
                  clickable linkMichael S03/15/17 04:05 AM
            ARM A73 benchmarks-latencyLinus Torvalds03/15/17 10:05 AM
              ARM A73 benchmarks-latencyIreland03/15/17 05:02 PM
              ARM A73 benchmarks-latencyGabriele Svelto03/16/17 03:45 AM
                ARM A73 benchmarks-latencyLinus Torvalds03/16/17 02:01 PM
                  lmbench is horribly brokenWilco03/16/17 04:57 PM
                    lmbench is horribly brokenLinus Torvalds03/16/17 06:49 PM
                      lmbench is horribly brokenLinus Torvalds03/17/17 01:10 PM
                        lmbench is horribly brokenLinus Torvalds03/17/17 01:52 PM
                        lmbench is horribly brokenExophase03/17/17 02:31 PM
                          lmbench is horribly brokenGabriele Svelto03/17/17 03:20 PM
                          lmbench is horribly brokenLinus Torvalds03/17/17 05:56 PM
                            lmbench is horribly brokenExophase03/17/17 06:21 PM
                              lmbench is horribly brokenLinus Torvalds03/17/17 06:43 PM
                                lmbench is horribly brokenIreland03/17/17 07:37 PM
                                  lmbench is horribly brokenbakaneko03/18/17 11:17 AM
                                    lmbench is horribly brokenIreland03/18/17 12:23 PM
                                      lmbench is horribly brokenanon03/18/17 07:35 PM
                                      lmbench is horribly brokenbakaneko03/21/17 08:08 AM
                                        lmbench is horribly brokenIreland03/21/17 03:14 PM
                                lmbench is horribly brokenGabriele Svelto03/18/17 04:01 PM
                                  accessing dram RichardC03/18/17 06:33 PM
                                lmbench is horribly brokenExophase03/18/17 04:26 PM
                                  lmbench is horribly brokenWilco03/18/17 05:40 PM
                                    benchmarking reality?Anon03/19/17 02:29 PM
                                    lmbench is horribly brokenLinus Torvalds03/19/17 04:25 PM
                                      mea culpa (lmbench is horribly broken)Linus Torvalds03/19/17 06:05 PM
                                        mea culpa (lmbench is horribly broken)Bill Broadley03/21/17 01:41 AM
                                          mea culpa (lmbench is horribly broken)Linus Torvalds03/21/17 09:01 AM
                                            mea culpa (lmbench is horribly broken)Linus Torvalds03/21/17 11:14 AM
                                            mea culpa (lmbench is horribly broken)Linus Torvalds03/21/17 05:03 PM
                                              mea culpa (lmbench is horribly broken)Etienne03/22/17 04:37 AM
                                              mea culpa (lmbench is horribly broken)Tim McCaffrey03/22/17 08:54 AM
                                                mea culpa (lmbench is horribly broken)Tim McCaffrey03/22/17 09:34 AM
                                                mea culpa (lmbench is horribly broken)Linus Torvalds03/22/17 10:35 AM
                                                  mea culpa (lmbench is horribly broken)Ireland03/22/17 12:11 PM
                                                    mea culpa (lmbench is horribly broken)Ireland03/22/17 12:26 PM
                                                    mea culpa (lmbench is horribly broken)rwessel03/22/17 03:03 PM
                                                      mea culpa (lmbench is horribly broken)Ireland03/22/17 03:35 PM
                                                  mea culpa (lmbench is horribly broken)Linus Torvalds03/22/17 01:35 PM
                                                    mea culpa (lmbench is horribly broken)Gabriele Svelto03/23/17 08:05 AM
                                                      mea culpa (lmbench is horribly broken)Linus Torvalds03/23/17 10:43 AM
                                                        mea culpa (lmbench is horribly broken)Gabriele Svelto03/23/17 01:56 PM
                                                          mea culpa (lmbench is horribly broken)Ireland03/23/17 02:36 PM
                                                  mea culpa (lmbench is horribly broken)Travis03/22/17 01:38 PM
                                              mea culpa (lmbench is horribly broken)anon03/22/17 07:22 PM
                                                mea culpa (lmbench is horribly broken)Travis03/22/17 08:57 PM
                                                  mea culpa (lmbench is horribly broken)anon03/23/17 12:44 AM
                                                    mea culpa (lmbench is horribly broken)Michael S03/23/17 05:59 PM
                                                      mea culpa (lmbench is horribly broken)Travis03/23/17 09:03 PM
                                              mea culpa (lmbench is horribly broken)anon03/23/17 01:14 AM
                                                mea culpa (lmbench is horribly broken)Linus Torvalds03/23/17 11:22 AM
                                                  Thank you. Associativity misses explain it.anon03/23/17 10:48 PM
                                                    Thank you. Associativity misses explain it.Linus Torvalds03/24/17 01:26 PM
                                                      Thank you. Associativity misses explain it.Ireland03/24/17 02:52 PM
                                  lmbench is horribly brokenLinus Torvalds03/19/17 03:51 PM
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