Initiating post-return loads early

By: anon (anon.delete@this.anon.com), April 18, 2017 6:28 pm
Room: Moderated Discussions
Paul A. Clayton (paaronclayton.delete@this.gmail.com) on April 18, 2017 8:39 am wrote:
> anon (anon.delete@this.anon.com) on April 17, 2017 7:57 pm wrote:
> > Paul A. Clayton (paaronclayton.delete@this.gmail.com) on April 17, 2017 6:43 pm wrote:
> [snip]
> > > With existing ISAs, any actual load (rather than prefetch)
> > > is constrained by the limited number of architectural
> > > registers.
> >
> > True, though prefetching instructions can be effective enough. If you know
> > the address early enough to prefetch into L1, then presumably compiler scheduling
> > and the OOO system can cope with the load latency at point of use.
>
> Instruction fetching can run ahead rather far (though it is limited by cache sizes). However, in a conventional
> OoO design, data loads are not initiated until local instructions have entered a relatively small window
> (ROB size is still below 200, scheduling windows are smaller and cache-miss dependent operations are not
> removed from this smaller window to make room for later load operations). The limited size of these windows
> constrains how far ahead data accesses can be hoisted even without data dependencies.
>
> Given the limited number of architected registers, compilers are somewhat limited in how far ahead
> a load can be scheduled. Even if the address is available arbitrarily early and the load value is
> know to be needed at a certain time-distance, architected register count constrains hoisting.
>
> It would be possible for hardware to support storing a pending load onto the stack to arbitrarily extend the
> number of loads that a compiler can hoist. This is effectively what deferred loads in the Mill provide. Since
> the active scope of a stack frame can be visible to hardware, hardware can use this information to guide data
> movement decisions (e.g., a two-deep "sleeping" stack frame does not need to be stored in the same low-latency
> storage as the active stack frame) and decisions about monitoring pending loads (e.g., when a stack frame
> becomes active [or is one level away from active or some more sophisticated prediction], hardware could scan
> the frame for pending loads and reissue them to load actual data into the stack slots).
>
> Like software prefetching, this introduces instruction and tracking overhead, forcing the compiler
> to decide if a particular load should be hoisted and how far ahead it should be hoisted.

I see what you mean. Seems like a lot of work for something simple prefetching could mostly take care of. I would expect pretty gains in narrow situations.

>
> > That is for the cases where you can do any kind of prefetch or early initiation of loads.
> > In general purpose code, the reality is that explicit prefetching is very difficult to
> > see much speedup with on a modern high performance OOOE CPU (actually for very regular
> > memory accesses it can be hard to win much over the hardware prefetchers too).
>
> Part of the difficulty in beating hardware prefetchers for regular accesses is that the interface for
> prefetching is relatively limited. For streaming accesses, software could tell hardware stride information,
> stream length, temporal locality, etc. avoiding detection delay (or prediction overhead) and late termination.
> Instead the interface requires software to explicitly prefetch each cache block (which also constrains
> loop unrolling and scheduling or forces the insertion of known useless prefetches). (Software-based
> stream prefetchers were provided in the early PowerPC Altivec implementations.)

For special purpose and small embedded devices it may be quite helpful. Current high end POWER implementations also have software stream control instructions. I don't know if it works very well (or rather, very well beyond hardware prefetchers). The fact that Intel doesn't seem to concerned about adding similar kind of suggests it's not a great benefit.

>
> (Similar issues exist where the compiler could hoist branch condition determination early enough
> to avoid mispredictions, but there is no interface to communicate this information and even when
> there is an interface that could be used hardware does not exploit the information in part because
> there is no declaration that certain idioms should be used [i.e., no guarantee that hardware will
> optimize such but a statement that such may be optimized and will not be pessimized].)
>
> Hardware can also more easily exploit the memory hierarchy, where traditional software prefetching
> would have to use multiple prefetch operations to first load into L3, then into L2, then into L1 (if
> the ISA even provides such distinctive prefetching). Hardware can not only use information about criticality
> but also information about speculative strength (i.e., likelihood of use in a given time frame). Detecting
> this dynamically introduces some overhead, but software is not given any means to provide this information.
> Software prefetches are forced by the ISA to assume that the hardware is relatively stupid and must
> be explicitly told repeatedly and at the right time what to do.
>
> (This is similar to the policy/implementation division. Software often has more knowledge of the "policy"
> (when data is going to be used), though hardware can often deduce such. Software intended to run on multiple
> microarchitectures (or even multiple workloads) is not as well suited to managing "implementation".)
>
> > So I'm curious as to where that leaves the mill. For general
> > purpose integer code, this vast table of speculative
> > loads will simply never get used. The problem most code has is not that it has vast amounts of addresses
> > to load and just doesn't have enough instruction window or outstanding misses to get them all in flight.
> > It's finding any additional meomry operations it can get in flight beyond the first one.
>
> Part of the issue of hoisting loads is aliasing. Itanium advanced loads and the Mill's deferred loads
> work around this issue by providing the value at use while initiating the load early. The Mill's interface
> is nicer than Itanium's in both avoiding use of a limited name space and in specifying a delay (though
> the delay is only within the scope of a function). (Neither the Mill nor Itanium make a distinction
> between "local aliasing" and "multithreaded aliasing", but this might be extended to the general overspecification
> of cache coherence (and consistency) or even more broadly to data communication (e.g., a register value
> is assumed to be usable by any operation following its production).)
>
> Some loads are data dependent (meaning they can be cache miss dependent); OoO execution
> typically handles these better than static scheduling by not stalling on the dependence.
> A statically scheduled processor could push some of these out of the "cycle-predictable
> domain" (as mentioned earlier indirect prefetching could help in some cases).
>
> There are some mechanisms that can expose a little more memory level parallelism while avoiding full out-of-order
> overheads. I suspect there could be a use for tagging data as "pending" as well as invalid (Itanium "Not a Thing",
> Mill "Not a Result"), though exploiting such moves a lot of complexity into hardware and requires a replay mechanism
> when/if a pending value is committed. Being able to determine that a particular load is a miss would allow software
> to conditionally schedule and independent subthread or aggressively prefetch (e.g., when a miss indicates a
> well-understood phase change where other loads are known to be likely to miss).

Sounds good in theory, but most software can never get anywhere close to making useful decisions with mechanisms like that.

>
> > > (With a register stack it would be possible to spill and refill registers and a mechanism could
> > > be provided to spill and refill the equivalent of Itanium's Advanced Load Address Table. With conventional
> > > register set, it would be possible to provide special spill and fill instructions to preserve reservations,
> > > but then the benefit relative to using explicit prefetch would be questionable (I suspect).) Ordinary load
> > > operations give the value at the time of the load; Itanium
> > > advanced loads and the Mill's deferred loads give
> > > the value at the time of use, allowing software hoisting of the load before possible aliases.
> > >
> > > In principle a dynamic processor could look ahead to after
> > > a function return to see possible loads that could
> > > be prefetched.
> >
> > I don't know what you mean by this. Function returns are trivial for any modern CPU to cope
> > with. OO processor can and does look ahead of this the same way it looks ahead of anything.
> > In-order ones also have return prediction and speculatively return from functions too.
>
> Function returns are not predicted until the return is encountered in the front-end. In theory,
> the instructions following a return could be scanned for loads at the time of the call rather than
> the return, allowing these loads (if not data dependent) to be initiated much earlier.

Ah okay, I see what you mean. Skeptical of doing a lot of speculative work far ahead of the instruction stream like that. Certainly if there is useful work to be done and loads to kick off in the function call, you would want to do those first. But return might be quite predictable so possibly if you stalled on dependencies along the actual instruction stream. Lot of work to maintain a whole speculative runahead state though.

> In a conventional
> architecture, such would be more speculative (because hardware does not know that a value on the
> stack is untouchable or that certain registers are caller saved) though the speculation would be
> highly reliable in common software. This would probably not provide many L2-missing loads (which
> are presumably more likely to be dependent on function provided data), but it could provide a little
> more memory level parallelism without excessively bloating tracking hardware.
>
> (Being able to hoist loads earlier could facilitate bandwidth improvements (with better
> bank scheduling), improve replacement choices, and/or potentially hide some L2 access
> latency. Even if no L2 misses are uncovered, there could be a performance benefit.)
>
> Unlike speculative multithreading, which would execute all the operations after the
> return in parallel with the instructions in the function (possibly using value prediction
> of the return value), such would focus on loads.
> This is similar to the difference between
> run ahead and OoOE in that one trades effectiveness for lower overhead.
>
> As a speculative technique, timing and reliability of prediction are significant. Prefetching
> after a function return that is not actually encountered until much later will waste resources.

Yeah. Interesting idea though.
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                                                    Fractional bits for instruction encodingMegol04/13/17 05:21 AM
                                                      fractional bitsRichardC04/13/17 06:20 AM
                                                        fractional bitsMegol04/15/17 06:22 AM
                                                          fractional bitsRichardC04/15/17 10:58 AM
                                                            fractional bitsAdrian04/16/17 04:08 AM
                                                              fractional bitsdmcq04/16/17 05:04 AM
                                                              fractional bitsMichael_S04/16/17 05:27 AM
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                                                                                        sgemm detailsRichardC04/21/17 09:45 AM
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                                                                                            Mill made more sense in 2003anon04/20/17 03:27 PM
                                                                                              Mill made more sense in 2003RichardC04/20/17 07:33 PM
                                                                                                Mill made more sense in 2003anon04/21/17 03:35 AM
                                                                                                  Mill made more sense in 2003RichardC04/21/17 05:25 AM
                                                                                                    DenverRichardC04/21/17 05:54 AM
                                                                                                      Denverdmcq04/22/17 04:57 AM
                                                                                                        DenverMichael S04/22/17 11:58 AM
                                                                                                          Denverdmcq04/22/17 12:57 PM
                                                                                                            DenverRichardC04/22/17 02:41 PM
                                                                                                              Denverdmcq04/22/17 03:35 PM
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                                                                                                                  loopsRichardC04/23/17 06:03 AM
                                                                                                                    loopsanon04/23/17 06:35 AM
                                                                                                            DenverMichael S04/22/17 03:41 PM
                                                                                                    Mill made more sense in 2003anon04/21/17 07:55 AM
                                                                                                      Mill made more sense in 2003RichardC04/21/17 08:56 AM
                                                                                                        Mill made more sense in 2003anon04/21/17 11:46 AM
                                                                                                          Mill made more sense in 2003RichardC04/21/17 02:13 PM
                                                                                                            Mill made more sense in 2003anon04/21/17 02:21 PM
                                                                                                      Mill made more sense in 2003none04/21/17 09:03 AM
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                                                                                                        Mill made more sense in 2003anon04/21/17 01:19 PM
                                                                                                        Mill made more sense in 2003Megol04/22/17 04:42 AM
                                                                                                          Mill made more sense in 2003RichardC04/22/17 11:07 AM
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                                                                                              Mill made more sense in 2003Jacob Marley04/20/17 10:14 PM
                                                                                                Mill made more sense in 2003Jacob Marley04/20/17 10:15 PM
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                                                                                            Mill made more sense in 2003Michael_S04/21/17 03:37 AM
                                                                                              Mill made more sense in 2003Gabriele Svelto04/22/17 03:17 PM
                                                                                        Mill is optimized for frequent callsHenry S04/21/17 02:27 AM
                                                                                          spillerRichardC04/21/17 07:53 AM
                                                                                            spiller documentationRichardC04/21/17 08:04 AM
                                                                                            spillerSymmetry04/21/17 08:47 AM
                                                                                              spillerSymmetry04/21/17 08:51 AM
                                                                                        Mill made more sense in 2003wumpus04/21/17 07:59 AM
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                                                                              Mill made more sense in 2003anon04/18/17 08:02 PM
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                                                                fractional bitsrwessel04/17/17 02:14 AM
                                                                  fractional bitsMichael S04/17/17 12:50 PM
                                                                    fractional bitsEugene Nalimov04/17/17 08:25 PM
                                                              fractional bitsMegol04/16/17 03:05 PM
                                                                fractional bitsdmcq04/17/17 03:04 AM
                                                                  fractional bitsGabriele Svelto04/17/17 10:09 AM
                                                                    fractional bitsMaynard Handley04/17/17 11:53 AM
                                                                      fractional bitsanon04/17/17 02:29 PM
                                                                Excellent exampleHenry S04/21/17 02:02 PM
                                                              fractional bitsanon04/16/17 05:31 PM
                                                                OoO instruction windowPaul A. Clayton04/17/17 06:43 PM
                                                                  OoO instruction windowanon04/17/17 07:57 PM
                                                                    OoO instruction windowMaynard Handley04/17/17 10:16 PM
                                                                      OoO instruction windowanon04/18/17 02:51 AM
                                                                        OoO instruction windowwumpus04/19/17 07:16 AM
                                                                    Initiating post-return loads earlyPaul A. Clayton04/18/17 08:39 AM
                                                                      Initiating post-return loads earlyanon04/18/17 06:28 PM
                                                                        Software assisted prefetchingPaul A. Clayton04/18/17 08:13 PM
                                                                          Software assisted prefetchingMaynard Handley04/18/17 10:04 PM
                                                                            Software assisted prefetchingMichael S04/19/17 01:49 AM
                                                              fractional bitsUngo04/17/17 08:03 PM
                                                            fractional bitsMegol04/16/17 02:33 PM
                                                              fractional bitsRichardC04/16/17 02:43 PM
                                                          fractional bitsBrett04/15/17 12:48 PM
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                                                              RISC warsBrett04/15/17 04:18 PM
                                                                RISC warsdmcq04/16/17 04:36 AM
                                                                  RISC warsBrett04/16/17 03:02 PM
                                                                    RISC warsMaynard Handley04/16/17 05:48 PM
                                                                      RISC warsBrett04/16/17 07:56 PM
                                                                        RISC warsMaynard Handley04/16/17 09:45 PM
                                                                          RISC warsBrett04/17/17 01:51 AM
                                                                      RISC warsSimon Farnsworth04/17/17 05:51 AM
                                                                        RISC warsdmcq04/17/17 06:24 AM
                                                                          RISC warsBrett04/22/17 02:36 PM
                                                                            RISC warsMaynard Handley04/22/17 03:14 PM
                                                                              RISC warsBrett04/22/17 05:54 PM
                                                                                RISC warsMaynard Handley04/22/17 09:17 PM
                                                                                  POWER8 - frequency, rename widthMichael S04/23/17 01:47 AM
                                                                                RISC warsMichael S04/23/17 02:25 AM
                                                                    RISC warsdmcq04/17/17 02:55 AM
                                                    Fractional bits for instruction encodingdmcq04/13/17 06:35 AM
                                                      Sounds like a FP counter with random rounding (NT)Paul A. Clayton04/13/17 07:08 PM
                                                        Sounds like a FP counter with random roundingdmcq04/14/17 12:35 PM
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                              RISC *was* science, not religionMichael S04/09/17 03:51 AM
                                RISC *was* science, not religionanon04/09/17 08:30 AM
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                    ARM vs RISC religionRichardC04/04/17 08:44 AM
                      ARM vs RISC religionEtienne04/04/17 09:22 AM
                        ARM vs RISC religionRichardC04/04/17 09:39 AM
                          ARM vs RISC religionExophase04/04/17 07:54 PM
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                    ARM vs RISC religiondmcq04/04/17 09:37 AM
                    ARM vs RISC religionwumpus04/05/17 07:14 AM
                  RISC *was* science, not religionIreland04/04/17 09:14 AM
                    RISC *was* science, not religionIreland04/04/17 03:12 PM
                      RISC *was* science, not religionIreland04/04/17 03:14 PM
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                    RISC *was* science, not religionMichael S04/04/17 11:24 AM
                      RISC *was* science, not religionExophase04/04/17 10:05 PM
                        RISC *was* science, not religionMichael S04/05/17 01:58 AM
                          RISC *was* science, not religionExophase04/05/17 11:07 AM
                            RISC *was* science, not religionMichael S04/05/17 03:38 PM
                          Load delay slot new value after cache missPaul A. Clayton04/06/17 10:29 AM
                            Load delay slot new value after cache missExophase04/06/17 03:05 PM
                      unspcified behaviour load delay slot pessimalityHeikki Kultala04/04/17 11:14 PM
                      RISC *was* science, not religionSimon Farnsworth04/06/17 05:18 AM
                        RISC *was* science, not religionRichardC04/06/17 09:54 AM
                          RISC *was* science, not religionSimon Farnsworth04/06/17 11:51 AM
                        RISC *was* science, not religiondmcq04/06/17 03:55 PM
                          RISC *was* science, not religionEtienne04/07/17 04:36 AM
                    RISC *was* science, not religionRichardC04/04/17 11:58 AM
                      RISC *was* science, not religionIreland04/04/17 03:20 PM
                      RISC *was* science, not religionIreland04/04/17 03:40 PM
                        RISC *was* science, not religionbakaneko04/05/17 12:52 AM
                          RISC *was* science, not religionIreland04/05/17 01:04 PM
                      RISC *was* science, not religiongallier204/05/17 05:06 AM
                        RISC *was* science, not religionRichardC04/05/17 09:14 AM
                          RISC *was* science, not religionSimon Farnsworth04/05/17 11:01 AM
                          RISC *was* science, not religionSeni04/05/17 12:26 PM
                          RISC *was* science, not religionDavid Hess04/05/17 11:36 PM
                            RISC *was* science, not religionRichardC04/06/17 12:32 PM
                              RISC *was* science, not religionExophase04/06/17 03:07 PM
                                RISC *was* science, not religionLinus Torvalds04/06/17 03:27 PM
                                  Intel x86 registers to the rescue!Mark Roulo04/06/17 03:45 PM
                                    Intel x86 registers to the rescue!Linus Torvalds04/06/17 04:25 PM
                                      Intel x86 registers to the rescue!John Yates04/06/17 05:51 PM
                                      Intel x86 registers to the rescue!David Hess04/08/17 06:49 AM
                                        Intel x86 registers to the rescue!Ireland04/08/17 04:47 PM
                                          Intel x86 registers to the rescue!wumpus04/08/17 06:51 PM
                                            Intel x86 registers to the rescue!David Hess04/09/17 03:57 PM
                                        Memory laneJohn Yates04/11/17 02:24 PM
                                          Memory lanesomeone04/12/17 06:27 AM
                                            Memory laneJohn Yates04/12/17 03:01 PM
                                          Memory laneIreland04/12/17 11:23 AM
                                    Intel x86 registers to the rescue!dmcq04/07/17 12:47 AM
                              RISC *was* science, not religionDavid Hess04/08/17 06:16 AM
                          RISC *was* science, not religiongallier204/05/17 11:49 PM
                            6502 = accumulator machine (NT)Wilco04/06/17 03:22 AM
                          RISC *was* science, not religiongallier204/06/17 12:12 AM
                            same difference ...RichardC04/06/17 12:57 PM
                    RISC *was* science, not religionRonald Maas04/04/17 09:04 PM
                      RISC *was* science, not religiondmcq04/05/17 12:03 PM
                        RISC *was* science, not religionAdrian04/05/17 02:24 PM
                      RISC *was* science, not religiongallier204/06/17 12:33 AM
                        RISC *was* science, not religionRonald Maas04/08/17 09:07 AM
                    RISC *was* science, not religionJohn Yates04/05/17 03:39 PM
                      RISC *was* science, not religionRichardC04/07/17 03:30 PM
                        RISC *was* science, not religionwumpus04/08/17 08:41 AM
                          RISC *was* science, not religionLinus Torvalds04/08/17 11:43 AM
                            RISC *was* science, not religionanon04/08/17 08:53 PM
                              RISC *was* science, not religionLinus Torvalds04/09/17 08:52 AM
                            VAX/VMS compatibilityRichardC04/09/17 07:54 AM
                              VAX/VMS compatibilityIreland04/09/17 08:19 AM
                              VAX/VMS compatibilityMichael S04/09/17 08:20 AM
                                VAX/VMS compatibilityRichardC04/09/17 08:32 AM
                                  VAX/VMS compatibilitydmcq04/09/17 08:47 AM
                                    I suppose, you are only familiar with British mainfraimes (NT)Michael S04/09/17 08:55 AM
                                      I suppose, you are only familiar with British mainfraimesdmcq04/09/17 05:12 PM
                                    VAX/VMS compatibilityIreland04/09/17 09:08 AM
                                    VAX/VMS compatibilityrwessel04/09/17 09:51 AM
                                      VAX/VMS compatibilityIreland04/09/17 12:35 PM
                                        VAX/VMS compatibilityanon04/09/17 06:24 PM
                                          VAX/VMS compatibilityIreland04/09/17 06:47 PM
                                            VAX/VMS compatibilityanon04/09/17 07:29 PM
                                              VAX/VMS compatibilityIreland04/09/17 07:43 PM
                                              Ireland = AI botanonymou504/10/17 05:21 AM
                                                That joke is getting old (NT)Anon04/11/17 01:23 AM
                                                  It isn't 100% a joke.Mark Roulo04/11/17 07:13 AM
                                                    It isn't 100% a joke.Michael_S04/11/17 10:19 AM
                                                      It isn't 100% a joke.Ireland04/11/17 10:48 AM
                                                      It isn't 100% a joke.anonymou504/12/17 09:40 PM
                                                    It isn't 100% a joke.Dan Downs04/11/17 04:05 PM
                                                      Shaka, when the walls fell (NT)Darmok04/12/17 12:19 AM
                                                      It isn't 100% a joke.Brendan04/13/17 05:34 AM
                                                        Can Someone Fix "Greater Than/Less Than" Handling Bugs??Brendan04/13/17 05:38 AM
                                                          6th decadeMichael S04/13/17 06:34 AM
                                                            6th decadeIreland04/13/17 10:17 AM
                                                        It isn't 100% a joke.Gabriele Svelto04/15/17 08:14 AM
                                                          It isn't 100% a joke.dmcq04/16/17 05:09 AM
                                                            It isn't 100% a joke.Brendan04/16/17 03:01 PM
                                                              The less loquacious left it alone (NT)Anon04/18/17 12:49 AM
                                                To Wit, many here..John H04/12/17 11:40 AM
                                                  To Wit, many here..Ireland04/12/17 11:54 AM
                                      VAX/VMS compatibilitydmcq04/09/17 05:02 PM
                                        VAX/VMS compatibilityIreland04/09/17 05:19 PM
                                        VAX/VMS compatibilityrwessel04/09/17 10:20 PM
                                          VAX/VMS compatibilitywumpus04/10/17 06:14 AM
                                            VAX/VMS compatibilityrwessel04/10/17 08:10 AM
                                            VAX/VMS compatibilitydmcq04/10/17 10:11 AM
                                          VAX/VMS compatibilityJohn Yates04/12/17 07:42 PM
                                            VAX/VMS compatibilityrwessel04/12/17 09:19 PM
                                    VAX/VMS compatibilityJohn Yates04/12/17 09:41 PM
                                      VAX/VMS development - thank you, JohnMichael S04/13/17 04:54 AM
                                        VAX/VMS development - thank you, JohnRob Thorpe04/14/17 08:19 AM
                                          VAX/VMS development - thank you, JohnJohn Yates04/14/17 04:20 PM
                                      VAX/VMS compatibilitydmcq04/13/17 06:23 AM
                        RISC *was* science, not religionanon04/08/17 11:04 AM
                          RISC *was* science, not religionIreland04/08/17 12:01 PM
                          RISC *was* science, not religionwumpus04/08/17 05:57 PM
                            RISC *was* science, not religionanon04/09/17 10:49 AM
                          RISC *was* science, not religionRicardo B04/09/17 04:15 PM
                            RISC *was* science, not religionanon04/09/17 11:07 PM
                              RISC *was* science, not religionRicardo B04/10/17 02:17 AM
                                RISC *was* science, not religionanon04/10/17 09:01 AM
                                  RISC *was* science, not religionRicardo B04/10/17 11:27 AM
                                    RISC *was* science, not religionanon04/10/17 03:25 PM
                                      RISC *was* science, not religionRicardo B04/10/17 05:12 PM
                                        RISC *was* science, not religionanon.104/10/17 10:54 PM
                                          RISC *was* science, not religionRicardo B04/11/17 03:14 AM
                                            RISC *was* science, not religiondmcq04/11/17 03:44 AM
                                            RISC *was* science, not religionanon.104/11/17 09:03 AM
                                              RISC *was* science, not religionWilco04/11/17 02:04 PM
                                                RISC *was* science, not religionanon04/11/17 09:07 PM
                                              RISC *was* science, not religionRicardo B04/11/17 02:15 PM
                                                RISC *was* science, not religionrwessel04/11/17 05:38 PM
                                                RISC *was* science, not religionanon04/11/17 08:36 PM
                                                  RISC *was* science, not religionRicardo B04/12/17 02:01 AM
                                                  RISC *was* science, not religionGabriele Svelto04/12/17 02:38 AM
                                                  RISC *was* science, not religionTravis04/12/17 12:20 PM
                                                RISC *was* science, not religionanon.104/11/17 10:54 PM
                                                  RISC *was* science, not religionRicardo B04/12/17 01:52 AM
                                                  RISC *was* science, not religiondmcq04/12/17 04:27 AM
                                                    RISC *was* science, not religionanon.104/12/17 08:43 AM
                                                      RISC *was* science, not religionanon.104/12/17 11:03 AM
                                              RISC *was* science, not religionMichael S04/11/17 02:32 PM
                                                RISC *was* science, not religionanon.104/11/17 10:45 PM
                                                  RISC *was* science, not religionMichael S04/12/17 10:07 AM
                                                RISC *was* science, not religiongpd04/12/17 02:31 AM
                                                  RISC *was* science, not religionTravis04/12/17 11:16 AM
                                                    RISC *was* science, not religionMichael S04/12/17 11:27 AM
                                                      RISC *was* science, not religionTravis04/12/17 12:02 PM
                                                        RISC *was* science, not religionMichael S04/12/17 12:46 PM
                                                          RISC *was* science, not religionTravis04/12/17 03:41 PM
                                                RISC *was* science, not religionTravis04/12/17 11:33 AM
                                                  RISC *was* science, not religionMichael S04/12/17 12:56 PM
                                                    RISC *was* science, not religionTravis04/12/17 04:22 PM
                                            RISC *was* science, not religionMichael S04/11/17 12:08 PM
                                        RISC *was* science, not religionanon04/11/17 02:10 AM
                                          RISC *was* science, not religionRicardo B04/11/17 03:28 AM
                                            RISC *was* science, not religionanon04/11/17 04:46 AM
                                              RISC *was* science, not religionmatthew04/11/17 08:59 AM
                                                RISC *was* science, not religionanon04/11/17 01:28 PM
                                        RISC *was* science, not religionMichael S04/11/17 11:41 AM
                                    RISC *was* science, not religionanon.104/10/17 08:03 PM
                                      RISC *was* science, not religionRicardo B04/11/17 03:47 AM
              RISC *was* science, not religionbakaneko04/03/17 11:45 PM
                RISC *was* science, not religionMichael S04/04/17 01:45 AM
                  RISC *was* science, not religionIreland04/04/17 09:30 AM
                  RISC *was* science, not religiondmcq04/04/17 09:43 AM
              RISC *was* science, not religionDavid Hess04/05/17 02:18 AM
                RISC *was* science, not religionMichael S04/05/17 04:02 AM
            RISC *was* science, not religionDavid Hess04/05/17 01:54 AM
              RISC *was* science, not religionRichardC04/05/17 04:31 AM
                ARM solution and MIPS condition evaluation?Heikki Kultala04/05/17 05:23 AM
                  ARM solution and MIPS condition evaluation?dmcq04/05/17 07:34 AM
                    MIPS condition evaluation?Heikki Kultala04/05/17 08:28 AM
                      MIPS condition evaluation?Michael S04/05/17 10:28 AM
                        MIPS condition evaluation?Heikki Kultala04/05/17 10:55 AM
                          MIPS condition evaluation?Michael S04/05/17 12:12 PM
                            MIPS condition evaluation?Heikki Kultala04/05/17 12:54 PM
                              MIPS condition evaluation?dmcq04/05/17 01:02 PM
                              MIPS condition evaluation?Heikki Kultala04/05/17 01:03 PM
                  ARM solution and MIPS condition evaluation?RichardC04/05/17 09:18 AM
                    ARM solution and MIPS condition evaluation?Linus Torvalds04/05/17 11:20 AM
                      ARM solution and MIPS condition evaluation?RichardC04/05/17 01:23 PM
                        ARM solution and MIPS condition evaluation?Linus Torvalds04/05/17 05:51 PM
                          ARM solution and MIPS condition evaluation?RichardC04/05/17 09:06 PM
                            TransputerRichardC04/06/17 05:20 AM
                            ARM solution and MIPS condition evaluation?Linus Torvalds04/06/17 08:54 AM
                              ARM solution and MIPS condition evaluation?RichardC04/06/17 11:14 AM
                                ARM solution and MIPS condition evaluation?Linus Torvalds04/06/17 11:40 AM
                                  ARM solution and MIPS condition evaluation?RichardC04/06/17 12:01 PM
                                    your theoryRichardC04/06/17 01:49 PM
                                      your theoryLinus Torvalds04/06/17 02:39 PM
                                        your theoryLinus Torvalds04/06/17 03:04 PM
                                          your theoryIreland04/06/17 03:48 PM
                                            Integrators of RISC cpu's interested only in software app salesIreland04/06/17 05:11 PM
                                          cheap machines with GUIsRichardC04/07/17 04:40 AM
                                            compatibility and evolutionary strategyRichardC04/07/17 06:27 AM
                                              68K clones?Michael S04/07/17 06:40 AM
                                                68K clones?Yuhong Bao04/07/17 07:54 AM
                                                Apollo core ...Mark Roulo04/07/17 10:28 AM
                                                68K clones?Ronald Maas04/07/17 06:07 PM
                                                68K clones?Per Hesselgren04/08/17 01:05 AM
                                                  68K clones?Per Hesselgren04/08/17 01:06 AM
                                                    68K clones?Michael S04/08/17 12:10 PM
                                              compatibility and evolutionary strategyIreland04/07/17 09:33 AM
                                              compatibility and evolutionary strategyIreland04/07/17 09:50 AM
                                                high-margin productsRichardC04/07/17 10:16 AM
                                                  high-margin productsIreland04/07/17 02:53 PM
                                                    high-margin productswumpus04/08/17 07:45 PM
                                                      high-margin productsRichardC04/09/17 06:06 AM
                                                        high-margin productsMichael S04/09/17 06:26 AM
                                                          high-margin productsIreland04/09/17 07:13 AM
                                                            high-margin productswumpus04/09/17 10:01 AM
                                                          user-visible ISA's still evolvingRichardC04/09/17 08:09 AM
                                                            user-visible ISA's still evolvingIreland04/09/17 03:08 PM
                                                      Economics and doing a MIPS, SGI or 3dfx startup today . . . Ireland04/09/17 08:08 AM
                                                        Economics and doing a MIPS, SGI or 3dfx startup today . . . bakaneko04/09/17 10:45 AM
                                                          Economics and doing a MIPS, SGI or 3dfx startup today . . . Ireland04/09/17 01:32 PM
                                        your theoryRichardC04/06/17 04:57 PM
                                          your theoryIreland04/06/17 05:29 PM
                                            your theoryIreland04/06/17 05:45 PM
                                          x86 ISA license historyRichardC04/06/17 05:31 PM
                                            x86 ISA license historywumpus04/07/17 07:35 AM
                                              x86 ISA license historyRichardC04/07/17 09:26 AM
                                          370 on 68KMatt Sayler04/06/17 05:38 PM
                                            370 on 68KDavid Hess04/08/17 10:18 AM
                                          your theoryLinus Torvalds04/06/17 07:20 PM
                                            your theoryRichardC04/06/17 08:34 PM
                                              Intel's clone warsRichardC04/06/17 08:42 PM
                                              your theoryIreland04/07/17 09:05 AM
                                            your theoryrwessel04/06/17 10:53 PM
                                            your theorygallier204/07/17 02:13 AM
                                            your theorygallier204/07/17 02:37 AM
                                              your theoryMichael S04/07/17 05:54 AM
                                                your theorygallier204/07/17 09:57 AM
                                              your theoryDavid Hess04/08/17 10:26 AM
                                                your theoryYuhong Bao04/08/17 10:28 AM
                                                your theorygallier204/09/17 05:38 AM
                                                  your theoryMichael S04/09/17 06:08 AM
                                                    your theoryrwessel04/09/17 10:04 AM
                                                      your theoryDavid Hess04/09/17 04:46 PM
                                                        your theoryrwessel04/09/17 08:58 PM
                                                  your theoryDavid Hess04/09/17 04:23 PM
                                                your theoryRichardC04/09/17 08:16 AM
                                                  your theoryDavid Hess04/09/17 04:58 PM
                                            Positive point about 80286Michael S04/07/17 06:31 AM
                                              Positive point about 80286gallier204/07/17 10:00 AM
                                                Positive point about 80286Yuhong Bao04/07/17 02:43 PM
                                                  Positive point about 80286Per Hesselgren04/08/17 01:16 AM
                                                Positive point about 80286David Hess04/08/17 10:49 AM
                                                  Positive point about 80286gallier204/09/17 05:44 AM
                                                    Positive point about 80286Ireland04/09/17 06:35 AM
                                                      Positive point about 80286gallier204/09/17 07:18 AM
                                                        Positive point about 80286Ireland04/09/17 07:30 AM
                                                          Positive point about 80286gallier204/09/17 10:43 AM
                                                            Positive point about 80286David Hess04/09/17 05:19 PM
                                                              Positive point about 80286Ireland04/09/17 05:24 PM
                                                                Positive point about 80286David Hess04/09/17 06:01 PM
                                                                  Positive point about 80286Ireland04/09/17 06:15 PM
                                                              Positive point about 80286 and MotorolaPer Hesselgren04/10/17 12:22 AM
                                                                Positive point about 80286 and MotorolaPer Hesselgren04/10/17 01:01 AM
                                                                  Positive point about 80286 and MotorolaPer Hesselgren04/10/17 01:39 PM
                                                                    Positive point about 80286 and MotorolaPer Hesselgren04/18/17 09:14 AM
                                                              Positive point about 80286gallier204/10/17 12:26 AM
                                                                Positive point about 80286Michael_S04/10/17 03:21 AM
                                                        Positive point about 80286David Hess04/09/17 05:11 PM
                                                          Positive point about 80286gallier204/10/17 01:15 AM
                                                            Positive point about 80286gallier204/10/17 01:20 AM
                                                    Positive point about 80286rwessel04/09/17 10:12 AM
                                                      Positive point about 80286gallier204/09/17 11:38 AM
                                                        Positive point about 80286Ireland04/09/17 12:17 PM
                                                          Positive point about 80286David Hess04/09/17 05:40 PM
                                                            Positive point about 80286Ireland04/09/17 05:48 PM
                                                          Positive point about 80286rwessel04/09/17 11:05 PM
                                                            Positive point about 80286wumpus04/10/17 06:31 AM
                                                              Positive point about 80286rwessel04/10/17 07:37 AM
                                                                Positive point about 80286David Hess04/10/17 09:53 AM
                                                        Positive point about 80286David Hess04/09/17 05:51 PM
                                                          Positive point about 80286wumpus04/11/17 06:41 AM
                                                            Positive point about 80286gallier204/12/17 04:20 AM
                                                          Positive point about 80286Yuhong Bao04/17/17 01:14 AM
                                                            Positive point about 80286David Hess04/17/17 02:37 AM
                                                              Positive point about 80286Joe Hodge04/17/17 06:54 PM
                                                    Positive point about 80286David Hess04/09/17 05:05 PM
                                                      Positive point about 80286Ireland04/09/17 05:13 PM
                                                        Positive point about 80286wumpus04/09/17 05:22 PM
                                                          Positive point about 80286Ireland04/09/17 05:43 PM
                                                            Positive point about 80286Ireland04/09/17 05:59 PM
                                                  Positive point about 80286wumpus04/09/17 05:17 PM
                                                    Positive point about 80286Ireland04/09/17 05:20 PM
                                        your theorydmcq04/07/17 01:04 AM
                                        your theoryGabriele Svelto04/09/17 01:47 PM
                                          your theoryIreland04/09/17 05:53 PM
                                          your theoryrwessel04/09/17 11:24 PM
                                  ARM solution and MIPS condition evaluation?Doug S04/07/17 11:24 AM
                                    ARM solution and MIPS condition evaluation?Linus Torvalds04/07/17 11:50 AM
                                      ARM solution and MIPS condition evaluation?Doug S04/10/17 09:58 PM
                                ARM solution and MIPS condition evaluation?Tim McCaffrey04/06/17 06:32 PM
                          ARM solution and MIPS condition evaluation?Doug S04/05/17 11:58 PM
                            Are you sure about orders of magnitude? (NT)Michael S04/06/17 03:24 AM
                        ARM solution and MIPS condition evaluation?Tim McCaffrey04/06/17 06:21 PM
                      ARM solution and MIPS condition evaluation?somebody04/06/17 09:41 AM
                        ARM solution and MIPS condition evaluation?Linus Torvalds04/06/17 12:01 PM
                          ARM solution and MIPS condition evaluation?Wilco04/06/17 07:17 PM
                            ARM solution and MIPS condition evaluation?Linus Torvalds04/07/17 11:35 AM
                              ARM solution and MIPS condition evaluation?Linus Torvalds04/07/17 12:20 PM
                              ARM solution and MIPS condition evaluation?Exophase04/07/17 01:22 PM
                                ARM solution and MIPS condition evaluation?Linus Torvalds04/08/17 01:32 AM
                                  Software FP vs trap emulationWilco04/08/17 05:20 AM
                                    Software FP vs trap emulationRonald Maas04/08/17 08:45 AM
                                      Software FP vs trap emulationdmcq04/08/17 10:29 AM
                                        Software FP vs trap emulationdmcq04/08/17 10:44 AM
                                          Software FP vs trap emulationWilco04/08/17 05:24 PM
                                        Software FP vs trap emulationLinus Torvalds04/08/17 10:52 AM
                                          Software FP vs trap emulationIreland04/08/17 11:46 AM
                                          Software FP vs trap emulationMichael S04/08/17 01:23 PM
                                            Software FP vs trap emulationLinus Torvalds04/08/17 03:38 PM
                                              Software FP vs trap emulationMichael S04/08/17 04:23 PM
                                          Software FP vs trap emulation@04/08/17 06:17 PM
                                            Software FP vs trap emulationLinus Torvalds04/09/17 08:59 AM
                                              Software FP vs trap emulationIreland04/09/17 09:20 AM
                                                Software FP vs trap emulationIreland04/09/17 09:35 AM
                                                Software FP vs trap emulationrwessel04/09/17 10:27 AM
                                                  Software FP vs trap emulationIreland04/09/17 01:49 PM
                                              Software FP vs trap emulation@04/09/17 11:59 AM
                                    Software FP vs trap emulationMichael S04/08/17 12:46 PM
                                      Software FP vs trap emulationWilco04/08/17 05:01 PM
                                        Software FP vs trap emulationBrett04/08/17 11:30 PM
                                          Software FP vs trap emulationmatthew04/09/17 01:14 AM
                                            Software FP vs trap emulationWilco04/09/17 07:10 AM
                                  Acorn vs DECRichardC04/09/17 08:27 AM
                                  ARM solution and MIPS condition evaluation?Exophase04/09/17 01:02 PM
                                    ARM solution and MIPS condition evaluation?Wilco04/09/17 02:52 PM
                                      ARM solution and MIPS condition evaluation?Exophase04/09/17 06:16 PM
                                        ARM solution and MIPS condition evaluation?Wilco04/10/17 01:40 AM
                                          ARM solution and MIPS condition evaluation?Exophase04/10/17 01:00 PM
                                            ARM solution and MIPS condition evaluation?Wilco04/10/17 04:19 PM
                              ARM solution and MIPS condition evaluation?Ireland04/07/17 05:34 PM
                RISC *was* science, not religionDavid Hess04/06/17 12:24 AM
                  RISC *was* science, not religionIreland04/06/17 09:54 AM
              RISC *was* science, not religionIreland04/05/17 01:23 PM
            CISC religion?wumpus04/08/17 09:49 AM
              CISC religion?Ireland04/08/17 01:24 PM
              CISC religion?Ireland04/08/17 01:39 PM
                Alan Turing Ireland04/08/17 05:31 PM
                  Alan Turing rwessel04/08/17 09:52 PM
                    Alan Turing Ireland04/09/17 05:35 AM
                CISC religion?wumpus04/08/17 07:19 PM
                  narrow vs wide skillsetsRichardC04/08/17 07:42 PM
                  CISC religion?rwessel04/08/17 09:33 PM
                    CISC religion?wumpus04/09/17 05:10 PM
                      CISC religion?David Hess04/09/17 07:56 PM
                        CISC religion?rwessel04/10/17 12:25 AM
              CISC religion?RichardC04/08/17 03:44 PM
                CISC religion?Michael S04/08/17 04:47 PM
                  CISC religion?Michael S04/08/17 04:52 PM
                    CISC religion?Ireland04/08/17 05:16 PM
                      CISC religion?Michael S04/08/17 05:26 PM
                        CISC religion?Ireland04/08/17 05:41 PM
                          CISC religion?wumpus04/08/17 08:04 PM
                            OT - faster RAMMichael S04/09/17 05:26 AM
                          CISC religion?rwessel04/08/17 10:10 PM
                            CISC religion?rwessel04/08/17 10:10 PM
                      gone parallel now ...RichardC04/08/17 07:15 PM
                CISC religion?gallier204/09/17 06:47 AM
                  fascinating link, thanks! (NT)RichardC04/09/17 09:46 AM
                CISC religion?Ricardo B04/10/17 05:55 AM
                  CISC religion?anon04/10/17 09:49 AM
                    CISC religion?Travis04/10/17 11:30 AM
                      CISC religion?Travis04/10/17 11:32 AM
                        CISC religion?anon04/10/17 02:12 PM
                          CISC religion?Travis04/10/17 07:41 PM
                            CISC religion?Michael_S04/11/17 10:44 AM
                      CISC religion?Ricardo B04/10/17 04:01 PM
                        CISC religion?Michael_S04/11/17 10:56 AM
                          CISC religion?Ricardo B04/11/17 01:27 PM
                        CISC religion?Wilco04/11/17 01:45 PM
                          CISC religion?Michael S04/11/17 02:07 PM
                          CISC religion?Ricardo B04/11/17 04:32 PM
                    CISC religion?Ricardo B04/10/17 04:24 PM
                  CISC religion?dmcq04/10/17 02:17 PM
                    CISC religion?Ricardo B04/10/17 05:16 PM
              CISC religion?Seni04/09/17 04:06 AM
                CISC religion?Ireland04/09/17 05:40 AM
                  CISC religion?wumpus04/09/17 10:08 AM
                yes, except ARM and SPARC lacked cacheRichardC04/09/17 05:50 AM
                  yes, except ARM and SPARC lacked cacheSeni04/09/17 06:19 AM
                    yes, except ARM and SPARC lacked cacheRichardC04/09/17 08:47 AM
                      minimal microcodeRichardC04/09/17 09:33 AM
                        minimal microcodeSeni04/09/17 10:02 AM
                          interesting, that makes sense (NT)RichardC04/09/17 02:45 PM
                      yes, except ARM and SPARC lacked cacheanon04/09/17 08:57 PM
                        yes, except ARM and SPARC lacked cacheRichardC04/10/17 06:18 AM
                          yes, except ARM and SPARC lacked cacheSeni04/10/17 03:51 PM
                            yes, except ARM and SPARC lacked cacheWilco04/11/17 02:56 AM
                              yes, except ARM and SPARC lacked cachedmcq04/11/17 03:06 AM
                                no, ARM's 42 rows x 36 bits = 189 bytes (NT)RichardC04/11/17 08:11 AM
                                  no, ARM's 42 rows x 36 bits = 189 bytesdmcq04/12/17 04:42 AM
                              yes, except ARM and SPARC lacked cacheSeni04/11/17 12:27 PM
                                yes, except ARM and SPARC lacked cacherwessel04/11/17 06:02 PM
                                  yes, except ARM and SPARC lacked cacheSeni04/11/17 10:27 PM
                                    yes, except ARM and SPARC lacked cacheRichardC04/12/17 11:06 AM
                                      yes, except ARM and SPARC lacked cacheSeni04/12/17 12:47 PM
                                        yes, except ARM and SPARC lacked cacheWilco04/12/17 01:38 PM
                                        not the normal usageRichardC04/12/17 07:58 PM
                                        yes, except ARM and SPARC lacked cacherwessel04/12/17 09:40 PM
                                    yes, except ARM and SPARC lacked cachedmcq04/12/17 02:19 PM
                                      yes, except ARM and SPARC lacked cacherwessel04/12/17 09:49 PM
                                        yes, except ARM and SPARC lacked cachedmcq04/13/17 03:44 AM
                                    yes, except ARM and SPARC lacked cacheanon04/12/17 08:06 PM
                        yes, except ARM and SPARC lacked cachewumpus04/10/17 06:37 AM
  Apple confirms that they are ditching Imagination within two yearsAnon04/03/17 02:36 AM
    Apple confirms that they are ditching Imagination within two yearsDoug S04/03/17 12:56 PM
      Or Samsung buys them, develops their own GPU, and uses the patents in the next lawsuit (NT)Anon04/03/17 01:26 PM
        Or Samsung buys them, develops their own GPU, and uses the patents in the next lawsuit Michael S04/03/17 02:33 PM
        Or ARM buys them, and gets any money they can from their IP and customersdmcq04/04/17 09:55 AM
  IMGTEC stock has crashed already.VertexMaster04/03/17 05:33 AM
    IMGTEC stock has crashed already.Andreas04/03/17 07:33 AM
      IMGTEC stock has crashed already.Exophase04/03/17 09:43 AM
    IMGTEC stock has crashed already.Doug S04/03/17 12:51 PM
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