Recent Articles

NAND Flash: A Classic Disruptive Technology

By David Kanter | 2009.12.30NAND flash is a welcome innovation in the storage market, but most analysis has centered around performance advantages for solid state drives (SSDs). This overlooks the equally or more important fact that NAND flash can be a less expensive solution than a hard disk for certain low-capacity applications. This is the classic hallmark of a disruptive technology.
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Larrabee 1 Defers Graphics, Bins Rendering

By David Kanter | 2009.12.04Larrabee is Intel's unique architecture for a family of throughput processors, developed for the graphics and HPC markets. We have recently learned that graphics products based on Larrabee 1, the first implementation, have been canceled and that it will instead be used as a software development vehicle. Larrabee's troubles lay in software, and now the question is what lies ahead in the future for Larrabee and Intel's graphics products.
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Inside Fermi: Nvidia's HPC Push

By David Kanter | 2009.09.30In the last several years, the landscape for computing has become increasingly interesting and diverse. GPUs have gradually evolved to be less application specific and slightly more generalized than their fixed function ancestors. The changes started in the DirectX 9 time frame, with real floating point (FP) data types, but still fixed vertex, geometry and pixel processing. DX10 hardware was really the turning point with unified shaders, relatively complete data types (i.e. integers were added) and slightly more flexible control flow. Today the high-end is a four horse race between AMD nee ATI, Intel’s and AMD’s integrated graphics and Larrabee, and Nvidia. All four face different goals, constraints and hence have taken slightly different paths. It is in this context that Nvidia has announced a next generation architecture, Fermi, which aims for even greater performance, reliability and programmability; unlocking even more software capabilities.
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Computational Efficiency in Modern Processors

By David Kanter | 2009.09.09The computer industry is on the cusp of yet another turn of the Wheel of Reincarnation, with the graphics processor unit (GPU) cast as the heir apparent of the floating point co-processors of days long gone. Modern GPUs are ostensibly higher performance and more power efficient than CPUs for their target workload, and many companies and media outlets claim they are leaving CPUs in the dust. Is this really the case though? This article explores the quantitative basis for these claims, with some surprising results.
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The Case for ECC Memory in Nvidia’s Next GPU

By David Kanter | 2009.08.19Nvidia's corporate strategy firmly rests on expanding the market for GPUs beyond graphics to include certain types of computation. Specifically, Nvidia’s efforts with CUDA are aimed at moving GPUs into the high performance computing (HPC) market, where the substantial compute capabilities and memory bandwidth directly translate into performance. Nvidia’s Tesla products (GPUs designed for computation instead of graphics) have made a bit of a splash, but at the moment the adoption is extremely limited. GPU clusters are basically non-existent, at least in part due to the lack of error detection and correction, which we believe will be corrected in the next product release from Nvidia.
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Hot Chips XXI Preview

By David Kanter | 2009.08.12Hot Chips 21 is nearly upon us, and with it comes updates from the major processor vendors and players in the PC industry and beyond. Key themes this year include CPUs, chipsets, FPGA and GPU co-processors and academic parallelism research. Our preview will briefly discuss and analyze some of the more interesting topics, with CPU highlights including AMD's Magny Cours, Fujitsu's SPARC64-VIIIfx, IBM's POWER7, Intel's trifecta of Moorestown, Beckton/Nehalem-EX and Westmere, and Rainbow Falls from Sun. In the broader ecosystem, there will be presentations on OpenCL, Ion from Nvidia, TI's OMAP SOC for mobile phones, and three major parallelism labs - Berkeley, Illinois and Stanford.
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Process Technology at IEDM 2008

By David Kanter | 2009.08.03David Kanter discusses 32nm process technologies presented at IEDM 2008 and VLSI 2009, including a discussion of high-k dielectrics and metal gates, immersion lithography and double patterning. Results from key manufacturers such as Intel, IBM/AMD, TSMC, Toshiba and others are discussed, analyzed and compared against previous generations using metrics for density (logic and SRAM) and switching speed metrics (for NFETs and PFETs).
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Nehalem Performance Preview

By David Kanter | 2009.04.07
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Tukwila Update

By David Kanter | 2009.02.05This article discusses the last minute changes made to the Tukwila platform, the impact on scheduling and the overall Itanium roadmap.
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