Intel’s Long Awaited Return to the Memory Business

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Intel’s Embedded DRAM

Embedded DRAM has a long history of niche applications within the industry. The biggest proponent by far is IBM, which uses eDRAM for the massive last level caches in the POWER7, POWER7+ and z196 server processors to improve array density. A more widespread application is the high bandwidth framebuffer in the Xbox360. At IEDM 2010, IBM reported results for eDRAM on a 32nm SOI process.

The VLSI paper from Intel describes a good implementation of embedded DRAM, particularly for a first generation product. While some of Intel’s reported metrics are less impressive than what IBM has achieved, Intel has only entered the field and is also constrained by cost-conscious customers.

Intel uses a trench capacitor to store the actual data bits. Unlike IBM’s work where the trench is dug into the silicon substrate, Intel’s eDRAM forms a high aspect ratio trench above the transistors in the metal interconnects and interlayer dielectrics and filled with a metal-insulator-metal capacitor. Presumably this improves manufacturing flows and yield at the cost of performance. The access transistor which controls the capacitor is one of Intel’s novel 22nm FinFETs to reduce leakage, which is crucial in determining retention time.

SRAM and DRAM bit cell size for Intel and IBM

Figure 1. SRAM and DRAM bit cell size for Intel and IBM

The DRAM cell area is reported as 0.029µm2 compared to 0.092µm2 for Intel’s densest SRAM cell, roughly a 3.1× improvement. The cells were fabricated in a 128Mbit macro that achieved 17.5Mbit/mm2 density with a >100µS retention time at 95C. Figure 1 compares the bit cell size for three generations of SRAMs and eDRAMs from Intel and IBM as reported at IEDM over the years. Intel’s eDRAM is not quite as dense as the 22nm generation from IBM. There are a number of possible explanations, starting with Intel’s focus on high yields and different trench formation techniques.

The retention time is also less impressive; IBM reported 40µS retention at 125C for a 20Mbit array. Retention times typically decrease by a factor of two for every extra 10C, although smaller arrays also tend to have longer retention times due to statistical effects. Realistically, retention is not a problem for Intel since Haswell is a client chip that is unlikely to reach junction temperatures much above 80C, whereas IBM’s server processors must operate at far higher temperatures.

Custom not Commodity Memory

While Intel’s eDRAM will have a big impact on the industry, it is not a direct threat to the high volume vendors like Samsung or Micron. The DRAM business is mostly a low margin, commodity business where cost metrics drive decisions; there are a few exceptions such as specialized solutions for high value applications such as networking or graphics. To give a rough idea, spot prices for a 128MB DRAM range from $1-$3. Intel has incredible margins by any standards (50-60%), and is uninterested in businesses where the gross margins are around 10-20% and silicon is essentially free. However, the custom DRAM market is a different story altogether.

Assuming our estimates are correct, the co-packaged 128MB eDRAM for Haswell will probably be 70-80mm2 (suggesting that the GT3e Haswell variant is around 210-240mm2). The embedded DRAM data arrays alone are at least 60mm2, and that doesn’t include overhead such as the controller and physical layer interfaces to the host SoC. Intel is rumored to be selling this part for around $50, which should give margins similar to low-end or mid-range client SoCs. While the price is less than a comparable-sized SoC, the cost should be lower since fewer layers of interconnect are needed. Conceptually, it will increase Intel’s manufacturing volumes and fab utilization without substantially sacrificing margins. As an added benefit, Intel’s integrated graphics will become much more robust and competitive.

In this regard, Intel is living up to its name and simply integrating more of the PC platform. While this is not competition for any DRAM vendors, it is an indirect threat. As Intel’s integrated graphics becomes more capable and takes more of the market, DRAM consumption will shift from companies like Nvidia and AMD (which buy from Samsung, Hynix, Micron, etc.) to Intel.

To put this in perspective, Intel has compared the Haswell GT3e performance to the discrete Nvidia GT 650M, which is used in the 15” Macbook Pro with 1GB of GDDR5. The GT 650M can also be configured with 2GB of DDR3 and is used by many other OEMs including Lenovo, Asus, and HP for notebooks that are priced around $1000. Intel’s 128MB custom eDRAM solution has similar bandwidth, but lower power and less board area, thus reducing the demand for GDDR5/DDR3 by supplanting it with Intel’s custom silicon.

Intel’s return to the DRAM business is emblematic of a larger shift in the industry. Moore’s Law is alive and well, but improving performance requires more than just shrinking transistors. Intel’s strategy is quite clear: differentiate through superior process technology and manufacturing and leverage this advantage through greater integration and delivering higher performance to customers. Intel’s embedded DRAM is just one step in this direction, there are assuredly many others on the roadmap.

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