The server market is at a potential inflection point, with a new breed of ARM-based microserver vendors challenging the status quo, particularly for cloud computing. We survey 20 modern processors to understand the options for alternative architectures. To achieve disruptive performance, microserver vendors must deeply specialize in particular workloads. However, there is a trade-off between differentiation and market breadth. As the handful of microserver startups are culled to 1-2 viable vendors, only the companies which deliver compelling advantages to significant markets will survive.
HP has won its lawsuit against Oracle over the Itanium platform. Good news for HP, customers and the industry, as Oracle is required to update and support existing Itanium software as long as HP continues to sell servers.
Over a decade, Itanium scaled down to 65nm re-using the same basic design. The new 32nm Poulson architecture moves from static VLIW to a more conventional pipeline. It has a new core with dynamic scheduling, fine-grained multithreading and a shared L3 cache. The net result is a vastly more efficient microprocessor that should achieve 2.5-2.8X higher performance and power high-end servers for the next 10 years.
In the last decade, the Itanium architecture has quietly progressed and achieved a measure of success in the high-end server market. Yet it has never lived up to the initial expectations and supplanted x86, leading many to wonder whether Intel would eventually abandon the architecture. The recently released ISSCC 2011 advanced program contains a paper describing Poulson, the next generation Itanium microarchitecture on Intel’s 32nm process. The title of the paper suggests that Poulson is a substantially enhanced design and that Itanium still has many years of life ahead. This article explores two microarchitectural possibilities for the new Poulson core.
This article discusses the last minute changes made to the Tukwila platform, the impact on scheduling and the overall Itanium roadmap.
This article presents a preview of ISSCC 2008, including discussion of Intel’s Itanium processor, codenamed Tukwila and an ultra-low power x86 MPU codenamed Silverthorne. Other presentations include Sun’s Rock and Niagara 3 processors, the 45nm CELL processor and assorted DRAM and SRAM prsentations.
CSI, Common System Interface, Coherent Interconnect, Intel, Nehalem, Tukwila, QuickPath Interconnect
Introduction On Tuesday, I attended Intel’s launch for the eagerly awaited Itanium MPU known as Montecito. I was also given an opportunity to speak with Kirk Skaugen, the GM of the Server Platforms Group. While there has been pretty good coverage of the event, there has not been much in the way of analysis. Rather […]
In this Silicon Insider, Paul examines the current, and near future, incarnations of the two server architectures vying for the performance crown: IBM’s POWER and Intel’s IPF.
This is the fourth article in a series that that started in 2000 with The Looming Battle in 64 bit Land, followed by The Battle in 64 bit Land Revisited in 2001, and The Battle in 64 bit Land, 2003 and beyond in 2003.