Alpha EV8 (Part 1): Simultaneous Multi-Threat

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This is the first installment in a three-part article about the futuristic Alpha EV8, the most powerful and ambitious microprocessor yet proposed. It describes the path leading up to the EV8 and offers a look at its general design and operational characteristics. Future articles will examine the technical challenge and promise of a powerful new technology called Simultaneous Multithreading, or SMT, that EV8 will exploit to increase its performance even further, and the serious implications for competing design approaches such as EPIC.

Can Alpha Get Its Groove Back?

All you guys look the same in my rear-view mirror. – Alpha designer on comp.arch

For nearly a decade the name Alpha has been to microprocessors what Ferrari and Porsche are to automobiles – spectacular examples of what can be done in the name of performance. But like those rare and expensive sports cars, the Alpha was more talked about than experienced. Being the last new architecture of the RISC era, it had to compete for the attention of software vendors against well-entrenched architectures like x86, SPARC, and PA-RISC. The first two generations of Alpha processors, the 21064 and 21164 (also known as the EV4 and EV5) set new records for both clock rates and performance. And despite constantly pushing the state of the art, Digital Equipment Corporation (DEC) established an exemplary track record in delivering ever-increasing clock rates and performance levels on or ahead of schedule.

However this changed in the late 1990’s. In contrast to the two earlier product roll-outs, the birth of the 3rd generation Alpha processor CPU core design, the 21264 (EV6), was a most difficult delivery. Some of the problems were due to the inherent complexity of the practically hand-crafted full-custom, sophisticated six-issue wide, out-of-order execution superscalar processor design. The rest of the difficulties were directly related to the fallout of the settlement of a nasty lawsuit DEC launched against Intel. This included the sale of the Hudson wafer fab, relocation of the Alpha design team, the purchase of DEC by Compaq, and the loss of key designers. As a result, the 21264 arrived late to market in 1998 and has suffered repeated delays and problems ever since in achieving timely process shrinks and the accompanying clock rate increases.

Despite all these challenges the EV6 core is a superb and well balanced design whose performance has only recently been challenged by new MPUs such as Pentium 4 and the yet to ship Power 4. The challengers are implemented in modern 0.18 um processes, a full process generation ahead of the 0.25 um process currently used to manufacture the fastest Alphas (EV67). In addition to a long promised shrink to 0.18 um (EV68) [1], the EV6 core will be soon be reborn in the form of the 21364 (EV7) processor. Although the processor core in the EV7 will differ little if any from the EV68, its performance will be significantly enhanced with the addition of a large on-chip L2 cache (1.75 MB), dual memory controllers supporting 8 Direct Rambus channels, and high bandwidth interprocessor communications interface integrated within the device. The EV7 will be a powerful competitor in the high-end 64-bit MPU market over the next several years, but in terms of processor design innovation it breaks no new ground.

The Compaq Alpha team’s next chance to recapture its old mystique by blazing new trails where no other MPU designers have gone before takes the form of the 21464, the EV8. The EV8 designation is ironically significant because the new Alpha core will implement a staggering eight-issue wide superscalar processor with out-of-order execution. In addition to wider issue width and an associated increase in the number functional units, the EV8 will introduce a potent and generally applicable new way to exploit parallelism, known as simultaneous multithreading (SMT). Aside from a brand new processor core, the EV8 device will incorporate the large on-chip caches, memory controllers and interprocessor communication links of the EV7 and so in a conceptual sense at least, will be a drop-in replacement for the EV7. The characteristics of Alpha Processor designs up to and including the EV8 are provided below in Table 1.

<b>Table 1 Alpha Processors – Past, Present, and Future (estimates in italics)</b>


21064 / EV4

21164 / EV5

21264 / EV6

21364 / EV7

21464 / EV8

Transistor Count (million)






Process Technology

0.75 um
bulk CMOS, Al, 3 LM
0.5 um
bulk CMOS, Al, 4 LM
0.35 um
bulk CMOS, Al, 6 LM
0.18 um
bulk CMOS, Cu, 7 LM
0.125 um

Die Size (mm2)






Package / Pins

CPGA 431

CPGA 499

CPGA 587

FC/SCP 1400

FC/SCP 1800

Target Clock Frequency

200 MHz

300 MHz

600 MHz

1.5 GHz

2.0 GHz

Power / Supply Voltage

30W / 3.3V

50W / 3.3V

72W / 2.2V

125W / 1.5V

250W / 1.2V

Instruction /Cycle



4 Fetch,

6 Issue

4 Fetch,

6 Issue

8 (16?) Fetch

8 (10?) Issue

Instruction Scheduling







Sustained Cache BW

600 MB/s

1 GB/s

4 GB/s

16 GB/s

64 GB/s

Sustained Memory BW

150 MB/s

400 MB/s

2 GB/s

10 GB/s

10 GB/s

Performance, SPECint95






Performance, SPECfp95






First Systems Ship






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