ARM’s Race to Embedded World Domination

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Sell Out to Santa Clara

As technically excellent as the SA-110 and follow-up products were, many potential customers were hesitant to adopt it due to lingering questions about the financial viability of DEC and its ability to sustain its underutilized Hudson fab. Then on May 12, 1997 DEC launched a surprise legal action against Intel alleging infringement of Alpha intellectual property. Three months later Intel countersued DEC, also alleging patent infringement. In a cruel twist of fate the StrongARM product family and its development team became pawns in the complex out of court settlement to end this nasty legal spat. As part of the settlement, Intel purchased the DEC Hudson fab as well as all non-Alpha related assets of Digital Semiconductor. Faced with the prospect becoming employees of their much-disliked adversary, most of the StrongARM design team voted with their feet and found gainful employment elsewhere.

Intel picked up the StrongARM pieces and moved them to Chandler Arizona under the auspices of their i960 embedded processor division after negotiating an architecture license with Advanced RISC Machines Ltd. Intel also went on to finish development of several SA-110 derivatives in progress at DEC, including the SA-1100 and SA-1110, which used the same CPU core but integrated memory controller functionality and various peripherals suitable for embedded and mobile computing. Ironically the StrongARM family became embarrassingly successful for Intel, a company that prefers to control and own the instruction set architectures of its products.

Can Anyone XPlain the New Name?

In late 1998 it became known that Intel’s embedded division was working on a second generation of StrongARM processor core that would exploit Intel’s 0.18 um process [7]. At the 1999 Embedded Processor Forum, Intel revealed that the execution pipeline in their second generation StrongARM would be stretched a further 2 stages to a total of 7 as shown in Figure 5.


Figure 5. Evolution of StrongARM Pipeline Organization

The clock rate of the new MPU would reach 600 MHz in Intel’s 0.18 um process while keeping power dissipation to under half a Watt [8]. Rather than name the new design StrongARM-2 or something equally logical, Intel decided to give it the strange appellation ‘XScale’. Perhaps this is an effort to distance itself from the embarrassing course of events that brought Intel into the ARM camp. More likely, this is to help Intel differentiate its offerings from those of other ARM licensees. Perhaps we can find consolation in the fact Intel didn’t transmute StrongARM to another fictional element to add to Pentium and Itanium in its marketing periodic table.


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