There is a widely held notion that RISC and CISC processor design have converged and the terms are now meaningless. Paul DeMone shows why this viewpoint is wrong and how the inherent superiority of RISC is influencing the future of the x86 architecture.
RISC vs. CISC Still Matters
February 13, 2000 by
Read More (6 pages)Be the first to discuss this article!
Intel’s History Lesson
January 25, 2000 by
Paul DeMone examines the failure of Intel’s first ‘super chip’ to see if Intel has learned all the necessary lessons to ensure success for their EPIC second attempt.
The Myths and Realities of Overclocking
December 21, 1999 by
Here is a very low-level look at what why overclocking works, and why it sometimes doesn’t!
Direct Rambus DRAM, Part 2 – Operation and Performance
November 22, 1999 by
Find out here exactly what the performance advantages – and disadvantages – of DRDRAM are from an industry expert.
Direct Rambus Memory, Part 1 – The Basics
November 7, 1999 by
Read More (3 pages)Be the first to discuss this article!HP’s Struggle For Simplicity Ends at Intel
October 27, 1999 by
A Renewed Quest For Architectural Simplicity As is often the case for troubled projects, the initial architects of what evolved into IA-64 started with the best of intentions: researchers at Hewlett Packard Laboratories (HPL) wanted to lead a second RISC revolution. The first RISC revolution, more than a decade earlier, was a reaction to the […]
AMD Aims To Take Over x86 Leadership
October 22, 1999 by
Read More (3 pages)Be the first to discuss this article!Intel’s EPIC Striptease Continues
October 9, 1999 by
Paul takes a critical look at the seemingly never-to-be-released EPIC design from Intel.
