Predictions and Conclusion
It is clear that with the exception of PowerPC, server RISC architectures will continue to lose market share at an accelerating rate. MIPS, Alpha, and PA-RISC will probably fall off the market radar screen by 2005, 2006, and 2008 respectively. SPARC will remain an important architecture in the server market for years to come, but will suffer almost constant decline due to competition from IPF, x86 and PowerPC. IPF is well positioned to pick up the vast majority of the existing MIPS, Alpha, and PA-RISC user base, considering it will run HP-UX, VMS and NSK in the immediate or near future. While SPARC’s marketshare is being leeched by PowerPC today, in the future, it will be split primarily between IPF and 64 bit x86. PowerPC’s share of the traditional non-x86 server market will likely peak this year or next and enter a long period of decline while IPF’s share will continue to grow rapidly over the next several years before starting to flatten as its frontiers push up against x86 and IBM’s zSeries and meet stiffer resistance to platform change.
The rapid growth of x86’s server market share in recent years will flatten dramatically as it crosses the 50% share by revenue line this year or next. AMD will likely make significant inroads in the x86 server processor market on the basis of important design wins at HP and Sun and Opteron’s strong performance, especially on memory intensive workloads. While AMD’s x86 server MPU market share could reach double digits by year’s end, it will have negligible impact outside the traditional x86 strongholds despite its 64 bitness. The primary and overwhelming victim of the rise of 64 bit x86 processors will be 32 bit x86 processors. Most of x86’s limited future server market share gain will come at SPARC’s expense in the $10k to $25k server market. The traditional RISC workstation market, currently dominated by SPARC, will continue to contract with most general purpose applications going to 64 bit x86 while most FP intensive applications, a minority these days, go to IPF.
The tremendous upheavals happening right now in the server market represents the start of the second and final phase of the victory of the merchant chip business model over the vertically integrated house RISC business model. The first phase of this process started nearly a decade ago with the introduction of the Pentium Pro and accompanying standard high volume chipsets and motherboards. This event started the industry down a long road that ended with x86’s virtual ownership of the 1 to 4 processor server market segment. The second phase of this process effectively began with the release of the Madison 6M Itanium 2 processor last summer. That marked the beginning of the end of the domination of 8 to 64+ CPU, high end segment of the server market by system vendor specific ISAs. Although the second phase of the rise of the high end merchant MPU will likely last into the next decade, the same economic and network effect forces that drove the first phase are still as potent and irresistible today, and thus virtually ensure a similar outcome.
 Johnson, D. , HP’s Mako Processor, Technical Proceedings, Microprocessor Forum 2001, October 16, 2001.
 Kalla, R. et al, Simultaneous Multi-threading Implementation in POWER5, Hot Chips 15, August 2003.
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