The Looming Battle in 64 Bit Land

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The 64 bit Contestants

In all likelihood the Alpha EV68, the Merced/Itanium, and UltraSPARC-III will begin shipping in production systems within the next three to six months. These devices will enter a 64-bit processor market that is currently performance dominated by the Alpha EV67 and HP PA-8600 processors. Besides the obvious competition between huge multinational corporations, the upcoming 64-bit MPU battle will also represent a clash between competing ideas, approaches and philosophies of how to build the best high end microprocessor.

The Alpha EV6 and EV7 and PA-RISC 8×00 are complex, dynamically scheduled processors with relatively short execution pipelines, with 7 stages each for simple instructions. The other end of the spectrum are the Merced/Itanium and UltraSPARC-III, which are in-order designs with relatively long execution pipelines of 10 and 14 stages respectively. The pipeline organizations of these four processor cores are shown in Figure 2.

Figure 2 Execution Pipelines of the Major 64 bit MPUs

Remarkably, the added complexity of the logic needed to implement out-of-order execution and the short execution pipeline of the Alpha and PA-RISC processors doesn’t seem to have had a noticeably negative effect on maximum clock rate, compared to the long pipelines of the theoretically simpler in-order Merced/Itanium and UltraSPARC-III processors. The design, manufacturing process, and estimated operational characteristics of these processors, and some of their successors are shown in Table 3. I didn’t include the Power4 because virtually nothing has been disclosed about the processor core.

Process (um)0.25/
Substr, metalbulk, Albulk, Albulk, AlSOI, Cubulk, AlBulk, Albulk, Al
Leff (um)0.0920.0920.
Area (mm2)193350469260>300>300244
I-cache64K, 2w64K, 2w512K, 4w768K, 4w32K, 4w?32K, 2w
D-cache64K, 2w64K, 2w1024, 4w1.5M, 4w32K, 4w?64K, 4w
L2 cache1.5M, 8w96K, 6w?
Clock (MHz)1100150060010008001200800
Power (W)70110907015015060
System Band-width (GB/s)3.212.8 mem
28.8 ipc/io

Table 3. Characteristics of Near Future 64 bit High End MPUs
(estimated values in italics)

The battle for mind share, as well as market share, in the 64-bit high-end market will be fought on many battlefields, not just performance or technical excellence. High performance is no more a guarantee of commercial success any more than poor performance leads to commercial failure, as SPARC and Alpha have aptly demonstrated over the last five years.

I have attempted to score the major 64-bit high-end processor families on some of these important if less tangible or quantifiable factors looking forward over the next several years, and the results are in Table 4. Uniprocessor performance is relatively straightforward – Alpha is king and it is up to IA-64 and Power to prove they can take the crown away. HP has traditionally kept PA-RISC performance close to that of Alpha, but the lack of a new core will start to hurt in the next few years. System bandwidth and multiprocessor scalability is a function both of the features built into the MPU, and the chipset and system architectures supported. The Alpha EV7 and Power4 will have awesome bandwidth and scalability, while McKinley’s shared bus architecture is a throwback to Intel’s legacy in low-end servers. Sun has long relied on multiprocessing to make up for SPARC’s uniprocessor performance deficiencies.

Uniprocessor PerformanceAB+BB+C
System BandwidthABCAC
MP scalabilityACBBA
System Software
Application SupportC+BBB-A
3rd Party SupportB-ACCB-
Marketing EffortC-ABCA
Technical LongevityAABAB
Economic LongevityBABB+A
Perceived LongevityCACBB+

Table 4. Relative Strengths of 64 bit High End MPU Families Looking Forward

Probably IA-64’s weakest aspect is the relative youth and immaturity of its system software, such as compilers and operating systems, compared to its established RISC competitors. Although Intel is strongly supporting independent software vendor (ISV) efforts to port applications to IA-64, it will lag the popular SPARC architecture for a long time. Third party support means that the MPU is available to third party OEM’s to build systems around. Alpha and SPARC MPUs and boards are available from Alpha Processor Inc. and Sun Microelectronics respectively. Of course, Intel will be pursuing primarily a merchant chip business model with IA-64. Marketing effort is an indication of how effective the sales organizations of companies that back each architecture are at getting their message across to potential buyers through the trade press and general media.

One of the important considerations computer makers assess when committing to a 64-bit MPU architecture is the longevity of a processor line. Technical longevity is an indication of how ‘future-proof’ the architecture is and how credible the roadmap of future implementations seems in terms of staying competitive in performance and cost with other 64-bit high-end MPU families. Economic longevity considers the ability of the backers of each processor family to continue to invest in it to keep it competitive based on its business model and sales levels. What I call perceived longevity touches on the less reputable side of the computer business – the sport of spreading fear, uncertainty, and doubt (FUD) about competing products and vendors. Alpha has been particularly hard hit by a combination of effective fear mongering by competitors and the troubled history of DEC’s final years before its acquisition by Compaq. Conversely Intel and HP have been effective in convincing many overly credulous individuals in the computer technical press that IA-64 represents something entirely new (EPIC) that will eventually supersede RISC.

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