Summary
Details about the CELL processor have been slowly emerging since its introduction at ISSCC 2005. Currently, only details about the hardware aspect of the CELL processor have been released by STI. However, as mentioned previously, the success and failure of the CELL processor to extend outside the domain of the game console depends not on the capability of the hardware to produce more FLOPS, but instead on the yet unknown and unproven software stack. The incongruity in the information released thus far by STI on the programmability of the CELL processor as compared to the hardware details of the processor have lead to some interesting discussions between those that firmly believe in its potential and those that have already dismissed it as yet another hyped up Emotion Engine. Direct exchanges between members of the two respective groups can become rather heated, as this writer will readily attest to (3 Hours of minimally-restrained verbal jousting in the lobby of the Palace Hotel). It is thus the opinion of this writer that perhaps arguments in regards to the “inevitability” of either the success or failure of the CELL processor should be deferred until details of the programming model are made available.
Regardless of one’s personal beliefs in the prospect of the CELL processor’s application outside of the Playstation game console, one company that cannot afford to completely dismiss the possible impact of the CELL processor is Intel. In the last 15 years, no RISC processor family has been able to challenge the predominance of the x86 processor family. The inability of RISC processor families to ship in enough volume to gain price parity with the x86 processor family has plagued all processor families that attempted in some fashion to compete against the x86 processor family. The cost issue means that at best, processors from RISC processor families offered better performance at higher prices. At worst, processors from RISC processor families offered worse performance at higher prices. However, the CELL processor offers a potential alternative to break through the price-volume conundrum in that the processor is virtually guaranteed to sell tens of millions of units inside of the next generation Playstation, and that volume may allow it to finally achieve near price-parity with processors from the x86 processor family (while allowing the entity that manufactures the processor to reach profitability, an enormously difficult proposition for anyone that tries to compete against the x86 steamroller).
The Playstation platform is expected to be inexpensive enough and yet powerful enough to run a majority of the relatively non-compute intensive tasks that are now commonly performed on the personal computer. As a result, the CELL processor presents a threat to the x86 processor family in that a consumer may find himself or herself not needing a personal computer with an x86 processor once he or she has purchased a Playstation to play games and discover that it can perform other tasks currently performed on the personal computer and handle the tasks of the modern digital multi-media living room as well(i.e. digital video processing). Clearly, this personal computer replacement/encroachment scenario did not developed as Sony might have hoped that it would with the Emotion Engine in Playstation 2. However, STI appears to have re-loaded to re-try the gambit yet again with the more capable CELL processor. At this time, there is yet no way to tell whether the CELL processor will be able to gain even a toehold outside of the domain of the game console, much less think about the implications of it pushing out x86 processor based personal computers. However, as Dr. Andy Grove so famously put it, “Only the paranoid survive”. In that sense, if Intel wishes to retain its competitive edge by remaining paranoid, it needs a competitive response to the CELL processor to prepare against the CELL-everywhere scenario in the “battle for eyeballs in the digital livingroom”.
References
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[3] N. Rohrer et. al. “PowerPC in 130nm and 90nm Technologies”, International Solid-State Circuits Conference Technical Digest, Feb. 2004.
[4] B. Flachs et. al. “A Streaming Processing Unit for A CELL Processor”, International Solid-State Circuits Conference Technical Digest, Feb. 2005.
[5] D. Pham et. al. “The Design and Implementation of a First-Generation CELL Processor”, International Solid-State Circuits Conference Technical Digest, Feb. 2005.
[6] J. Kuang et. al. “A Double-Precision Multiplier with Fine-Grained Clock-Gating Support for a First-Generation CELL Processor”, International Solid-State Circuits Conference Technical Digest, Feb. 2005.
[7] S. Dhong et. al. “A 4.8 GHz Fully Pipelined Embedded SRAM in the Streaming Processor of a CELL Processor”, International Solid-State Circuits Conference Technical Digest, Feb. 2005.
[8] K. Chang et. al. “Clocking and Circuit Design for a Parallel I/O on a First-Generation CELL Processor”, International Solid-State Circuits Conference Technical Digest, Feb. 2005.
[9] H. Hofstee, “ Power Efficient Processor Architecture and the Cell processor“, Proceedings of the Eleventh International Symposium on High-Performance Computer Architecture (HPCA 11). Slides
[10] D. Wang, “ ISSCC 2005: The CELL Microprocessor “, http://www.realworldtech.com/page.cfm?ArticleID=RWT021005084318, Real World Technologies, Feb 10, 2005.
Copyright
Copyright 2005 David T. Wang. All rights reserved. No portion of this article, in part or whole, may be reproduced, copied, transmitted, stored, downloaded, in any manner in anyway for any purpose whatsoever without the express written consent from the author.
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