ISSCC 2008 Cell Processor Update

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Smaller, Faster or Lower Power – Choose Lower Power

In a previous article that covered IEDM 2005 [1], we pointed out that the game of process scaling is one where the chip designers must choose between smaller, faster or lower power, instead of getting all three simultaneously. IBM’s 45 nm CELL processor is a prime example where the chip designer selected lower power as the primary characteristic for improvement in porting to a new process technology.

The low power focus is somewhat natural given that the primary target of the CELL processor is the Sony PS3 game console, where higher performance is not needed (or wanted), but where lower manufacturing and operating costs are highly desirable. Reducing the thermal envelop and power requirements for CELL will enable the PS3 to be re-designed into a smaller and lower power form factor.

In its presentation, IBM cited four specific reasons that enabled it to dramatically reduce the power consumption of the 45 nm CELL processor down to forty-percent that of the 90 nm CELL processor.

  1. IBM converted dynamic circuits used in the 90 nm and 65 nm designs to fully static circuits.
  2. A number of regular Vt transistors, used in critical speed paths, are converted to high Vt transistors. In 65 nm CELL processor, 2.4% of the PMOS transistors and 2.9% of the NMOS transistors were regular Vt transistors. In the 45 nm CELL processor, those numbers have been reduced to 0.5% and 0.7%, respectively.
  3. Re-optimized signal paths removed the requirement for high-speed, high-slew-rate drivers, the high-speed, high-slew-rate drivers are then replaced with slower and lower power drivers.
  4. Careful study of the on-die current consumption characteristic enabled a re-optimized mapping of the power distribution grid (C4 bump mapping), which in turn enabled lower voltage drops across the power distribution grid. In combination with the more advanced process technology, the lower voltage drop enabled the processor to operate with a lower supply voltage, resulting in further reduction in power consumption. (65 nm CELL processor operates with Vdd = 0.9V, 45 nm CELL processor operates with Vdd = 0.8V.)

Figure 1 – Simulated Power Envelopes of the CELL Processor – Presented by IBM

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