The processor has 64 GPRs, with the following specialized semantics:
* %r63 (%zero) always reads 0 when used as a source operand
* %r62 (%sink) is a discarded destination (e.g., for compares); it is never read
* %r59 (%from) saved return address
* %r58 (%link) return address
* %r47 (%sp) is the current stack pointer
* %r0 (%eax) for current x86 machine state
* %r1 (%ecx) for current x86 machine state
* %r2 (%edx) for current x86 machine state
* %r3 (%ebx) for current x86 machine state
The lower 48 of these GPRs are backed by shadowed GPRs: whenever a bundle has its commit bit set, the Commit stage latches the current values of the GPRs into the ‘known good’ shadow GPRs.
The processor also includes 32 80-bit floating point registers and 16 FP shadow registers; these are not discussed in this report.
There are also a wide variety of special purpose registers (SPRs), including the condition codes, profiling registers, power control settings and so on.
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