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Intel Alder Lake supports AVX-512 despite what others might have misunderstoodAlderLake2020/07/13 09:55 AM
Skylake-SP area breakdownDavid Kanter2020/07/12 06:13 PM
intel ark portal dead?Michael S2020/07/12 12:22 PM
Alder Lake and AVX-512me2020/07/11 07:02 AM
Intel Focused Value PredictionFVP2020/07/07 05:29 AM
Apple confirms dumping AMD GPU support in WWDC 2020 presentationAppleGPU2020/07/07 01:01 AM
Concurrency costsTravis Downs2020/07/06 07:26 PM
Two more pieces are filled in...Maynard Handley2020/07/05 12:16 AM
Small 5" bezel-less smartphone project OneDevice.Pierre-Louis Boyer2020/07/01 06:44 AM
Load-Acquire vs Load-AcquirePCMichael S2020/07/01 02:15 AM
InterestingMaynard Handley2020/06/29 10:55 AM
Rosetta 2 benchmarkNiels Jørgen Kruse2020/06/29 09:12 AM
Where does the OS run in a hetero-core? (HPC, IBM, ARM)David Kanter2020/06/28 10:58 AM
If we petition Apple can we get them to open source the upcoming A14 chip's RTL ?anon2020/06/27 08:28 PM
ARM smartphone share?anonymous22020/06/26 09:08 PM
Reducing self-modifying code / single-use JIT performance penaltyNyan2020/06/26 09:06 PM
Ice Lake statusMichael S2020/06/26 08:10 AM
Intel Advanced Matrix Extensions (Intel AMX) instruction set in Intel Sapphire RapidsAMX2020/06/26 05:21 AM
Apple dumped x86 because Skylake sucked?Doug S2020/06/25 10:58 PM
idea for iMac Pro in 2021 Michael S2020/06/25 01:15 AM
AMD on MacsMaynard Handley2020/06/24 07:36 PM
Summary on Arm macsnever_released2020/06/24 11:16 AM
Anandtech says Rosetta 2 won't support AVXDoug S2020/06/23 03:45 AM
Does transition to Apple Silicon mean no more discrete AMD GPU?Geert Bosch2020/06/22 08:38 PM
Woo Hoo!!!!!!!Maynard Handley2020/06/22 11:26 AM
TPUv3 paper at CACMDavid Kanter2020/06/21 10:32 AM
ouch!Maynard Handley2020/06/20 10:40 AM
Fine-grained binning of OOOE structuresTravis Downs2020/06/18 05:40 PM
Jim Keller unexpectedly leaves Intelanonymou52020/06/11 03:32 PM
Special Register Buffer Data Sampling (Intel CPU exploit)anonymous22020/06/09 10:55 AM
AMD Zen with ARM front-endPaul2020/06/09 06:13 AM
Apple Plans to Announce Move to Its Own Mac Chips at WWDCClaire McDonald2020/06/09 04:47 AM
Rumor: AMD C7 (ARM Cortext-X1/A78/...)anonymous22020/06/02 11:23 PM
Understanding Cortex M4F instructions timingMichael S2020/06/01 11:07 AM
ISCA 2020 Intel paper: Focused Value Predictionanonymou52020/05/30 04:52 PM
Why are split L2 caches unpopular?anon22020/05/30 04:37 PM
What secrets does the kernel have?Paul A. Clayton2020/05/28 01:47 PM
ARM L1$ and L2$ replacement algorithimblaine2020/05/27 02:57 PM
ARMARM cortex A78 and X1 releasedp2020/05/26 03:03 PM
kreg (mask) register file shared with MMX/x87Travis Downs2020/05/26 12:17 AM
Old school (~1995-2003) frequency scaling vs today within a single node?John H2020/05/23 05:32 AM
Coming compute style?Moritz2020/05/22 01:20 AM
PowerPC takes a risky stepanon2020/05/22 12:04 AM
What are these white parts?Travis Downs2020/05/21 09:20 AM
New Intel Optimization manualanon2020/05/21 07:54 AM
New article: Transistor count: A Flawed MetricDavid Kanter2020/05/18 07:04 AM
TSMC halts new Huawei orders after US tightens restrictionsdmcq2020/05/18 03:46 AM
Staggered timer interrupt?Paul A. Clayton2020/05/16 02:42 PM
12 ways to fool the masses (HPC)Paul A. Clayton2020/05/16 02:41 PM
The bombshellPaul2020/05/15 12:19 AM
NVIDIA Ampere Architecture In-DepthAmpere2020/05/14 07:15 AM
Skylake CPU can eliminate some zero-on-zero writesTravis Downs2020/05/13 03:09 PM
New article: Power Delivery in a Modern ProcessorDavid Kanter2020/05/11 07:37 AM
google maps on firefoxMichael S2020/05/10 01:49 PM
68K equivalent of Pentium Chronicles?John H2020/05/09 04:14 AM
I-to-M transitionTravis Downs2020/05/01 04:17 PM
Intel removed ECC support from latest i3 CPUsMaxwell2020/04/30 05:27 PM
Post-Silicon CPU Adaptationanon2020/04/29 08:59 PM
OpenCL 3.0Laurent2020/04/28 08:06 PM
High res SKL-SP die shotTravis Downs2020/04/27 05:19 PM
Unneccessary MUXesMoritz2020/04/27 12:41 PM
It's now a rumor in the mainstreamMaynard Handley2020/04/23 09:02 AM
Come see my MLPerf talk at GTCDavid Kanter2020/04/15 08:23 PM
Constraints on clock frequencyAndrew Clough2020/04/15 11:08 AM
Google building its own phone SoCAnon2020/04/14 01:40 PM
Tiger lake leak, Intel 10nm fixed?Tiger Lake Leaks2020/04/14 09:30 AM
Intel V0LTpwn vs. SGXAdrian2020/04/12 03:38 AM
Does Alexa offer genuine automation? How about Google Home?Maynard Handley2020/04/10 07:03 PM
Increasing the number of "in flight" instructions on OoO processorsEtienne2020/04/07 12:50 AM
Canyon Bridge Capital seeks to appoint 4 board members to ImgTecBenji Gifford2020/04/04 05:48 PM
Tachyum Prodigy detailsAdrian2020/04/03 04:17 AM
Why not initialize all variables to zero?Doug S2020/03/26 12:13 PM
Intel Rocket Lake-SRocket Lake2020/03/22 09:53 AM
A12ZMaynard Handley2020/03/18 10:51 AM
AMD has ray tracing in the xboxxbox curious2020/03/18 08:26 AM
Do you really need a sense amplifier for MRAM?Paul2020/03/13 01:37 AM
LVIanonymou52020/03/10 10:11 AM
TRRespassanonymou52020/03/10 10:08 AM
Anandtech Graviton2 review with SPECnobody in particular2020/03/10 05:44 AM
gcc is a fine compiler but... 2020-03Michael S2020/03/09 03:05 PM
A64FX microarchitecture manualnone2020/03/09 10:26 AM
Are Intel CPU top guns are still working for them?Michael S2020/03/09 09:47 AM
Cascade Lake L3 Adaptive Replacement Policyanon2020/03/08 02:24 PM
Intel Alder Lake has 8 big cores(Golden Cove?) and 8 small cores(Gracemont?)Alder Lake2020/03/08 12:16 PM
Relevant to Nuvia?Maynard Handley2020/03/05 12:22 PM
Speaking of using native OS functionalityMaynard Handley2020/03/03 02:46 PM
Cost of starting a thread on different microarchitecturesanon2020/03/01 05:03 AM
I want to make a proper workstation class laptopPaul2020/02/26 06:22 PM
ARM based MACsJose2020/02/25 04:56 AM
Zen2 ISSCC slidesitsmydamnation2020/02/21 03:07 PM
Has there ever been a CPU with ...Moritz2020/02/21 08:11 AM
ARM custom instructionsGabriele Svelto2020/02/18 08:43 AM
The indescribable stupidity of bfloat16Hans de Vries2020/02/18 05:35 AM
AMD Family 17h Instruction Latencies spreadsheet ?Michael S2020/02/11 03:05 AM
ARM announces Cortex M55 and Ethos-U55 Andrew Clough2020/02/10 12:31 PM
clang is a fine compiler but...Michael S2020/02/08 12:28 PM
Load-Store architecture vs direct memory ops tradeoffs , and micro-ops - what am I missing?Heikki Kultala2020/02/05 04:26 AM
flag merging uops on SkylakeTravis Downs2020/01/26 01:20 PM
What are ports, really?Travis Downs2020/01/24 01:16 PM
Logic in leading foundry process nodesMoritz2020/01/24 11:28 AM
Centaur Technologies AMA on Reddit-.-2020/01/22 09:42 PM
*Interesting*Maynard Handley2020/01/20 02:50 PM
aarch64 online compiler explorersMichael S2020/01/19 08:08 AM
AVX-512 downclocking postTravis Downs2020/01/16 09:20 PM
LLVM comments on mem*Maynard Handley2020/01/14 01:51 PM
SKX IVRTravis Downs2020/01/12 08:28 PM
weird movd + ymmTravis Downs2020/01/06 04:48 PM
both rwt forum and site are slow. Is it just me? (NT)Michael S2020/01/05 02:35 PM
Nuances related to Spinlock implementation and the Linux SchedulerBeastian2020/01/03 12:46 PM
On package stacked memoryPaul2020/01/02 11:00 PM
So the Apple GPU was really a PowerVR after allGabriele Svelto2020/01/02 02:22 PM
Fermi and Gen9 on GB4 HistEqChester2020/01/01 07:01 PM
Steven Sinofsky on PC futuresMaynard Handley2019/12/31 09:17 PM
Memory-memory move instructions on x862019/12/31 11:47 AM
On-package and on-die powerPaul2019/12/30 08:31 AM
Interesting reverse engineering of the PSP in the previous generation of AMD ZenAdrian2019/12/29 06:38 AM
Intel Xe variable vector widthHugo Décharnes2019/12/27 09:32 AM
Job Opening for ISA ArchitectzArchJon2019/12/19 07:40 AM
Beyond hot and cold code?Paul A. Clayton2019/12/17 02:03 PM
IC coherenceanon.12019/12/17 02:25 AM
more specology - BMIMichael S2019/12/14 01:04 PM
RISC-V sumitGabriele Svelto2019/12/13 02:38 PM
Detailed comparison of ARM vs x86 on WindowsBeastian2019/12/11 09:21 AM
ThunderX3juanrga2019/12/11 01:17 AM
Apple suing Williams III over NuviaBeastian2019/12/10 07:56 AM
Forum registration seem to be brokenPaul2019/12/10 05:40 AM
Hotchips 2019 ProceedingsPoindexter2019/12/10 05:38 AM
Ampere second gen ARM serversjuanrga2019/12/06 06:57 AM
AVX-512 mask registersTravis Downs2019/12/05 02:03 PM
Graviton2 server chipJose2019/12/03 10:43 AM
Graviton2 SoCGionatan Danti2019/12/03 10:42 AM
Single Thread performance is aliveanonimi2019/11/29 12:29 PM
Cost of adding a second read portTravis Downs2019/11/26 01:49 PM
How much do you win with AVX512Per Hesselgren2019/11/26 09:13 AM
RISC-V Foundation moving to Switzerland over trade curb fearsanonymou52019/11/26 12:38 AM
Notes from SC19David Kanter2019/11/25 06:54 PM
Next year AMD Zen is claimed to have a new microarchitectureAdrian2019/11/19 07:35 AM
A new x86 core & SoC from VIA/CentaurGabriele Svelto2019/11/19 07:14 AM
A64FX prototype enters Green500 at #1Wilco2019/11/18 01:41 PM
More details about the Intel XeAdrian2019/11/17 11:36 PM
New competitor for server CPUsAdrian2019/11/15 09:50 AM
Cray/Fujitsu supercomputing partnershipGabriele Svelto2019/11/13 02:38 PM
while we're at Intel Core bugshobold2019/11/12 03:10 PM
Intel jump erratumTravis Downs2019/11/12 01:09 PM
Why no ADC/SBC instructions not exposed in ACLE?Michael S2019/11/11 02:56 AM
How Swift ABI is implementedMaynard Handley2019/11/09 12:11 PM
Apple's early silicon effortsMaynard Handley2019/11/06 01:57 PM
Risc-V getting real?Anon2019/10/31 03:10 PM
Glofo and TSMC patentslockederboss2019/10/31 09:41 AM
What's the most efficient processor as far as area is concerned?Philip2019/10/25 04:31 AM
Tremont detailsJohn2019/10/24 11:52 AM
Intel TremontAdrian2019/10/24 11:46 AM
Exynos 990Beastian2019/10/23 03:31 PM
Zen 2 criticism / Zen 3 theoriesWes Felter2019/10/20 05:15 PM
gcc generates better code than MSVC ? Well, it dependsMichael S2019/10/19 06:27 PM
New Transisitor Optimization in Willow Coveme2019/10/19 07:51 AM
Move elimination - where documented?Michael S2019/10/09 11:27 AM
Well that's finally over:Maynard Handley2019/10/07 07:35 PM
Ice Lake updates to optimization manualTravis Downs2019/10/05 06:38 PM
Intel proposes new SAPM memory type to protect against Spectre-like attacksBhima2019/10/04 07:20 AM
Samsung rumored to be ditching Mongoose uArchBeastian2019/10/02 09:54 AM
Microsoft semi-custom processorsAdrian2019/10/02 08:59 AM
Surface Pro X SQ1 ARM SoC detailsBeastian2019/10/02 08:38 AM
Where are they now?nostalgiac2019/10/02 01:17 AM
server marketsomeone2019/09/27 10:55 PM
Dell PE R240 refuses to turbo to MaxMichael S2019/09/25 03:17 AM
Jim Keller talk hints at Ocean Cove ambitionsBeastian2019/09/24 06:31 PM
IBM z15 CPU DetailsAnon2019/09/20 01:52 PM
Apollo Lake reliability issueGionatan Danti2019/09/18 03:20 AM
uarch-bench for Ryzen 3000Adrian2019/09/16 08:19 AM
netcat security flawjouni osmala2019/09/12 10:22 PM
Why does IBM use so many metal layers?anon2019/09/11 06:09 PM
Scoring the rumors:Maynard Handley2019/09/10 12:53 PM
Linux discriminates Zen2 versus Haswell when loading libraries?Hans de Vries2019/09/08 10:18 PM
TB on ice lake dieMr. Camel2019/09/08 08:02 AM
Apple Math/Matrix (?) Extensions@never_released2019/09/07 05:38 AM
Apple A13 ~13% faster single core, with ~6% faster clocksShowsOn2019/09/03 02:26 AM
What exactly is "a core" ?John H2019/08/28 03:11 PM
Any future for clustering architectures?Andrew Clough2019/08/28 05:39 AM
Big Blue Open Sources Power Chip Instruction Setanon2019/08/22 07:05 PM
Geekbench 5John Poole2019/08/22 07:38 AM
InterruptsTravis Downs2019/08/19 06:13 PM
Wafer scale 46225 mm^2 device!Doug S2019/08/19 09:52 AM
Gen Z DIMMsMaynard Handley2019/08/16 01:14 PM
Rome / Zen 2 DeepdiveBeastian2019/08/15 02:26 PM
Intel AVX-512 dev boxMr. Camel2019/08/13 12:30 PM
Xilinx Versal series - how many dies?Michael S2019/08/11 01:57 PM
Zen 2 EPYC perf much lower than Ryzen 3?anonymous22019/08/11 12:39 PM
Amateur collaborative content generationPaul A. Clayton2019/08/10 07:55 AM
EPYC SAP-SD 2-tier benchmark resultsMichael S2019/08/08 05:18 AM
Zen 2 Serveranonanon2019/08/07 06:37 PM
haunting continues: SWAPGShobold2019/08/07 01:42 AM
Linux on Apple SoCs@never_released2019/08/04 11:05 AM
Why does Ice Lake have such low base frequency?anon2019/08/03 07:09 PM
Apple is scumanon2019/08/03 12:19 AM
ICL memory renaming?Travis Downs2019/08/02 06:43 PM
Intel kills Omni-Pathj2019/08/01 12:33 PM
Ice Lake benchmarksAdrian2019/08/01 06:14 AM
Why no ARM DSP?Maynard Handley2019/07/31 03:49 PM
What do we expect from A13?Doug S2019/07/31 09:44 AM
Per-core binning on Ryzen 3000Wes Felter2019/07/30 12:11 PM
Why major web browsers don't feature convenient "No JS" switch?Michael S2019/07/30 03:26 AM
ARM Flexible Access and RISC-V Gabriele Svelto2019/07/29 01:40 PM
4-way SMT on Zen 3 rumor viabilityshaidarharan2019/07/26 01:11 PM
Cheap cloud providers with perf accessTravis Downs2019/07/25 03:31 PM
No loop unrolling on ZenGian-Carlo Pascutto2019/07/25 03:58 AM
AMD joins CLX consortiumAMD joins CXL2019/07/19 07:50 AM
Zen2 instruction latency/throughput dumpKyle Siefring2019/07/13 04:06 PM
Ryzen 2 die photoschester lam2019/07/12 05:55 PM
RISC-V base ISA ratifiedGabriele Svelto2019/07/12 11:04 AM
Future Intel server CPUs will be "Glued-together"Adrian2019/07/09 11:17 AM
AMD Zen 2 (ie, Ryzen 3000 line) benchmarks publicJason Creighton2019/07/07 03:05 PM
Do amd/intel ever give developers cpusKyle Siefring2019/07/05 05:51 PM
System vendor selling chips used in its systemsPaul A. Clayton2019/06/27 08:25 PM
ARM1/ARM2 Alternative? (20/20 Hindsight)Paul A. Clayton2019/06/27 05:47 PM
InterestingMaynard Handley2019/06/27 01:55 PM
Apple's A Series Micro-Arch is not from ARM HoldingsFacePalmedToTheNthDegree2019/06/26 09:34 PM
Security bug in AMD PSP firmwareAdrian2019/06/25 08:38 PM
Daniel Nenni (Semiwiki) and Intel's role in landmark inventionsAM2019/06/25 07:51 AM
TSMC Demonstrates A 7nm Arm-Based Chiplet Design for HPCjuanrga2019/06/25 01:59 AM
MLPerf Inference v0.5 benchmarks out!David Kanter2019/06/24 10:09 AM
Relative ARM core performanceanonymous22019/06/24 09:21 AM
gather latencyTravis Downs2019/06/19 01:15 PM
Facebook Workload AnalysisReading Papers2019/06/18 05:45 PM
Cortex-A76 & Cortex-A65 optimization guidesAdrian2019/06/14 07:27 AM
David Kanter & Gamers Nexus on AMD Navianon2019/06/13 01:26 PM
RAMBleed: Reading Bits in Memory Without Accessing ThemAdrian2019/06/11 11:44 AM
Could EPYC/Rome have eDRAM L4? (as memory-side cache)Heikki Kultala2019/06/11 04:37 AM
Performance "speed limits"Travis Downs2019/06/11 01:23 AM
Xeon E or Xeon W or Zen 2?john.doe2019/06/10 10:09 PM
Geekbench 4 Latency TestChester Lam2019/06/09 12:54 PM
Dr.Pizza of Ars TechnicaNikolas2019/06/08 12:02 AM
Why compilers don't generate vroundsd reg,reg,reg,0 ?Michael S2019/06/07 04:18 AM
European ARMv8.4-A HPC CPUAdrian2019/06/05 09:18 PM
32G library of 17k CPU docs with a focus on x86b2019/06/05 04:53 PM
Pre-populating anonymous pagesTravis Downs2019/06/05 04:48 PM
POWER9 instruction latencyTravis Downs2019/06/05 08:23 AM
SNC split reservation stations/sched?anon2019/06/04 07:39 PM
Ice Lake die sizeAM2019/05/31 10:59 AM
Exynos 9820 Geekbench 4 scoresAM2019/05/30 10:19 AM
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