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7950X vs 7950X3D for non-gaming workloads?anonymous22023/03/19 02:48 PM
Neoverse V1 & V2 SVE vector length?anonymous22023/03/13 10:09 PM
Apple Market Share---2023/03/08 12:55 PM
Future of CPU cooling?anon2023/02/24 03:07 PM
48G UDIMM? Many questionsanonymous22023/02/18 06:30 PM
Share your hardware configurations for workstations / desktop systemsAnon2023/02/18 01:18 PM
AMD 3D dual-CCD binninganon2023/02/17 08:10 AM
Raptor Cove vs Zen 4 Single Thread Performanceanon2023/02/13 09:51 AM
Rumored Nuvia Phoenix core problemFP2023/02/10 02:05 PM
LPDDR and on-die ECCMichael S2023/02/10 05:15 AM
NUMA-related scheduler decisions on big.LITTLE-like CPUs on Linuxanon2023/02/05 11:19 AM
Razer Project LindaChris G2023/02/02 07:02 AM
Is Intel Arc the best GPU for linux?anon2023/02/01 05:30 PM
Is there a CCD-aware Linux scheduler?anon2023/02/01 11:34 AM
Abandoning x86 in the hopes of a brighter futurezebra2023/01/31 01:24 PM
Do compilers/assemblers take into account cache structures for target uarchs?John H2023/01/31 06:25 AM
Intel quietly kills RISC-5 development environmentblaine2023/01/30 01:10 AM
State of x86 CPUs on Linux (AMD/Intel)anon2023/01/29 05:54 PM
Is Zen 4 Threadripper worth waiting?anon2023/01/29 01:14 PM
In-Band ECC in Raptor Lake-PWes Felter2023/01/29 10:17 AM
Intel sales crater 32 percent.Brett2023/01/27 03:37 PM
NYT on SPR---2023/01/26 10:37 AM
DRAM error protection proposal for chips like M1 UltraMartin L.2023/01/22 09:16 AM
how to: 32-bit application on x86-64 LinuxMichael S2023/01/13 06:07 AM
Q: DDR5 ECC memory speeds/timinganonymous22023/01/12 06:47 PM
7950X3D, asymmetric cache?anonymous22023/01/06 12:48 AM
How ISA's scale, is x86 unbeatable?Kara2023/01/04 11:36 PM
David Chisnall on RISC-V instruction space (and more)c2022/12/31 05:32 PM
RISC-V core bugs?anonymous22022/12/29 06:07 PM
Zen 4 runs hot, is 4c going to be better?anonymous22022/12/22 02:42 PM
tom's HARDWARE: Apple Is Struggling to Build Mac Pro Based on Its Own Silicon: Reportanonymou52022/12/20 02:55 AM
(link) IEDM 2022: Did We Just Witness The Death Of SRAM?anonymous22022/12/14 03:27 PM
anandtech feels dead, chipsandcheese no better (NT)Kara2022/12/09 02:51 AM
Intel not a monopoly any more:Brett2022/12/08 10:47 AM
What happens when DRAM has more bandwidth than Layer 3 cache?Etienne2022/12/08 07:20 AM
Any thoughts on Dell CAMM?Paul A. Clayton2022/12/05 10:49 AM
fno-omit-frame-pointer?Gionatan Danti2022/12/03 03:32 AM
8086 MOV SS / POP SS interrupt delay... and x86 decoding in generalanonymou52022/11/26 05:38 PM
Is 1 more expensive than 0?Andrey2022/11/21 05:23 AM
posts disappear ?Michael S2022/11/16 01:41 AM
IEEE binary128 support on ARM Macs ?Michael S2022/11/14 04:18 PM
x64 successorAvantgarde2022/11/13 05:42 AM
Why is Rosetta 2 fast?Ungo2022/11/10 03:01 PM
One 512-bit vector unit versus 2 256-bit vector units, re Zen 4 AVX-512Jeffrey Bosboom2022/11/04 06:18 PM
A16 packaging---2022/10/25 10:45 AM
The Intel 2022-09 ISA ExtensionsAdrian2022/10/20 01:11 AM
How would undocummented, private ISA extensions work in Linux-based systems?Ana Rodriguez2022/10/19 11:12 AM
Any die shots of Ryzen 7000 I/O die?hobold2022/10/18 01:52 PM
Playing with fire? Shutting down the Chinese semiconductor industryRay2022/10/14 05:08 PM
downturnanonymou52022/10/12 12:23 PM
GPNPU?---2022/10/07 02:40 PM
ARM new developments 2022dmcq2022/10/07 06:50 AM
Pat Gelsinger interviewAdrian2022/10/07 05:17 AM
SPECworkstation 3Per Hesselgren2022/10/01 06:06 AM
NVIDIA Linux driver and Kernel 5.19 & 6.0Philippe2022/09/30 05:14 AM
ARM announces Armv8.9 and Armv9.4noko2022/09/29 08:02 PM
For Chester: Nvidia’s RTX 4090 Launch---2022/09/28 06:57 PM
Zen 4 idle power?anonymous22022/09/26 10:32 PM
Zen4's AVX512 Teardown (from 08:57 AM
A16 Jetstream2 result---2022/09/22 02:46 PM
Why no callee-saved vector registers?Michael S2022/09/20 01:44 PM
new versions of gcc on Debian LinuxMichael S2022/09/19 10:28 AM
GH repo to measure core-core latencyanonymous22022/09/18 02:40 PM
ARM Neoverse V2 - SVE2 is 4x128anonymous22022/09/16 09:04 AM
Connectivity issues?Doug S2022/09/15 08:52 PM
Data integrity of L1 cachesanon22022/09/15 07:04 PM
What implemention of TSX is present on Sapphire Rapids?Robert Williams2022/09/12 07:58 PM
A packaging question---2022/09/11 09:28 PM
No Perf/Clock gains on A16_2022/09/08 04:27 PM
forum buganonymou52022/09/01 01:22 AM
Arm sues over Nuvia/Qualcomm acquisitionWes Felter2022/08/31 03:06 PM
New details on NVidia's Grace server CPUJeff McWilliams2022/08/31 12:20 PM
Zen 4, AVX-512 support, 2 cycle execution timeanonymous22022/08/29 05:08 PM
Chips & Cheese analyzes Tachyum’s Revised Prodigy ArchitectureNobod2022/08/27 09:21 AM
Do we need branch prediction?Kara2022/08/24 02:07 PM
Hardware Transactional Memory, the end?rwessel2022/08/20 06:50 PM
What happened to mill computing? (NT)Kara2022/08/20 02:29 PM
Zen 4 I/O Die at 6nmanonymous22022/08/18 03:56 PM
Qualcomm's second server act, after Centriq cancellationBeastian2022/08/18 11:43 AM
Intel's abandoned Pentium 5 projecttacobell2022/08/14 01:35 PM
Zen 4 Infinity Fabric clock reaches 3 GHzWes Felter2022/08/09 01:40 PM
AEPIC leakAdrian2022/08/09 12:21 PM
Interesting ARM compiler data---2022/08/08 02:54 PM
ISA (x86/armv8) q: Why isn't "gcc -Os" ~ "gcc -O3" ? (NT)anonymous22022/08/05 10:11 AM
Tachyum sues Cadence over IP "sabotage"Wes Felter2022/08/03 03:17 PM
Empirical data on ISA design parametersNvaxPlus2022/08/02 08:45 AM
What kind of FPGA is this?Per Hesselgren2022/07/31 08:48 AM
AMD passes Intel in market capanonymous22022/07/29 05:47 PM
RIP Optane/XPointWes Felter2022/07/28 07:53 PM
Code density comparisonsRayla2022/07/27 01:44 PM
CheriBSD running KDEdmcq2022/07/26 03:32 PM
IBM 5 bit microcontrollerDuane Sand2022/07/24 11:50 AM
Happy 26th anniversary!David Kanter2022/07/23 07:24 PM
China’s SMIC Is Shipping 7nmSomata2022/07/21 02:52 PM
Microinstruction format in older Atom CPUsAdrian2022/07/19 04:57 AM
Imagination TechnologiesMr. Camel2022/07/15 11:17 AM
Retbleedanonymous22022/07/13 03:14 PM
[OT] Sturgeon's Observation: reasons for its truth?Paul A. Clayton2022/07/10 05:20 AM
Is SVE really Apple's future?---2022/07/09 04:07 PM
Shape of largest die that fits on reticleMath Nerd2022/07/08 04:57 AM
Linear Address Spaces: Unsafe at any speed [article]Kester L2022/06/29 01:49 PM
New ARM Cortex cores launchRayla2022/06/28 08:49 AM
EPYC3 refuses to boostMichael S2022/06/28 03:44 AM
TSMC's node densities - new article from AngstronomicsBjörn Ragnar Björnsson2022/06/27 12:52 PM
NDA balderdash, Arm guessing gameKara2022/06/26 10:55 AM
forget transistor size, we're lacking architectsKara2022/06/26 10:17 AM
Apple memory compression --2022/06/25 01:39 PM
OK dumb question timeDoug S2022/06/24 01:31 PM
Wider vectors vs GPU---2022/06/24 09:43 AM
ARM refresh MIA?Rayla2022/06/21 10:59 AM
P6 High Performance I/O and WebMr. Camel2022/06/21 06:39 AM
ILP wall vs SIMD vec2022/06/17 12:44 PM
M2 benchmarks-2022/06/15 12:27 PM
Measuring latency on Snapdragon devicesJonathan Kang2022/06/14 11:47 AM
New article: Intel 4 Process Scales Logic with Design, Materials, and EUVDavid Kanter2022/06/12 07:05 PM
Zen 4 mobile (Phoenix Point) "chiplet architecture"AngstromAndy2022/06/10 04:46 PM
Pointer authentication flaw in M1Doug S2022/06/10 11:52 AM
Bone of contention: AMD resurrects AVX-512 ... sort of ...Björn Ragnar Björnsson2022/06/09 07:00 PM
Chips, Cheese and Sunny CoveJames2022/06/07 05:57 AM
macOS 13 virtualization framework to support Rosetta 2 inside Linux VMsUngo2022/06/07 01:36 AM
Peter Lewis = AIanonymou52022/06/06 05:57 PM
Apple unveils M2, taking the breakthrough performance and capabilities of M1 even furtherM22022/06/06 12:07 PM
GPU Using LPDDR5Someone with gray hair2022/06/03 12:36 PM
Crazy CXL NamesPeter Lewis2022/05/30 03:54 PM
[Fun] Transform any text into a patent applicationdmcq2022/05/29 02:25 AM
Intel Falcon Shores = Xeon CPU + Ponte Vecchio GPU + cache chipJohn R2022/05/27 12:25 PM
Performance of H100 SXM vs H100 PCIeMatt Hughes2022/05/27 03:17 AM
Zen 4 is really badKara2022/05/26 01:52 AM
Addressing in a NoC---2022/05/17 11:02 PM
EPYC Instinct ModuleJim Wilson2022/05/12 06:13 PM
Cache-Coherent Interfaces for High-end GPUsJim Wilson2022/05/12 05:43 PM
Apple's AVX512---2022/05/12 12:32 AM
display "equalization"---2022/05/09 07:30 PM
HD vs HP Process---2022/05/05 12:08 PM
Side-channel attacks on the data memory-dependent prefetchers in M1ribit2022/05/01 07:00 AM
DDR4 & DDR5, new Intel & AMD CPUsBjörn Ragnar Björnsson2022/04/29 07:20 PM
What's causing 5800X3D to perform much better on simulators than other "applications"?John H2022/04/27 05:20 PM
How maxOS manages M1 CPU coresAndrew Clough2022/04/25 05:11 AM
OpenBSD 7.1 is out for Apple M1Brett2022/04/23 11:21 AM
For fans of Minority Report UI's---2022/04/21 12:35 PM
Apple NVM machine---2022/04/19 04:52 PM
vGPUs?---2022/04/15 07:32 PM
Why was enterprise SATA SSDs common for a long time?Yuhong Bao2022/04/15 05:06 AM
Apple M1 TLB tradeoff anonymous22022/04/14 08:39 AM
VLM (on Compaq Alpha) would have been better than AWE...Yuhong Bao2022/04/14 03:20 AM
manufacturing/packaging of the M1 Ultra---2022/04/10 11:26 AM
Intel directly copies Zen presentation for Ocean Cove patentphoson2022/04/06 08:03 AM
IBM z16 Announcementrwessel2022/04/05 06:31 PM
SRAM vs logic scaling with mfg processes - temporary situation, not a real trendHeikki Kultala2022/03/28 11:15 PM
Centaur CNS analysisAdrian2022/03/23 02:18 AM
Page File SizesZenmont2022/03/22 06:39 PM
GPU Microarch DocsKyle Siefring2022/03/22 02:59 PM
Nvidia H100 Tensor Core GPUHopper2022/03/22 08:48 AM
M1 Ultra Chip Interconnect LatencyIan Ameline2022/03/16 01:22 PM
RISC-V asm instruction name madnessHeikki Kultala2022/03/09 01:35 AM
Apple M1 UltraWouter Tinus2022/03/08 12:20 PM
Intel to fuse-disable AVX-512 on Alder Lakeanonymous22022/03/04 03:26 PM
Optimizing blocksize of data based on memory architecturerocky2022/03/03 12:28 AM
Fujitsu announce discontinue mainframesBrett2022/02/26 01:59 PM
So the last shall be first...anon22022/02/23 08:25 AM
[738 words] Benchmarking interactive systemsPaul A. Clayton2022/02/21 08:51 AM
Exynos rnda sucks, but didn't everyone know that?Kara2022/02/20 06:57 PM
Intel to license x86 coresPaul A. Clayton2022/02/15 01:28 PM
AMD Tcase_max data Daniel B2022/02/12 05:26 PM
AMD acquiring XilinxKonrad Schwarz2022/02/11 04:21 AM
NVIDIA/Arm deal officially offrwessel2022/02/08 06:00 AM
Arm has released a prototype of its Morello development board for researchers at Google, Microsoft blaine2022/01/28 04:17 PM
Intel to build two fabs in OhioBrett2022/01/23 01:03 AM
*guaranteed* IO scheduling---2022/01/14 07:39 PM
Google TPU architecture evolution paperNet Random2022/01/07 10:26 AM
How good is Intel 7?anon22022/01/04 07:26 PM
A Critical Look at SVE2 For Integer Workloads-.-2022/01/02 05:56 PM
cache (non)banking---2021/12/26 11:07 PM
Apple CPU Perf/W. Main FactorKara2021/12/24 08:31 AM
NSO Group exploit emulates logic gates!Doug S2021/12/17 12:36 PM
Electricity is magnetismBrett2021/12/14 04:01 PM
Imagination tech back in cpu with risc-vKara2021/12/06 09:48 AM
Some info about the Amazon Graviton 3Adrian2021/12/03 06:51 AM
Cortex a710 merged core SVEKara2021/12/01 11:32 AM
Cost of rowhammer invulnerability?Chester2021/11/30 08:25 AM
Sectoring and suchlike in L1 caches---2021/11/29 10:03 PM
Integrated graphics card and discrete graphics card on Linux kernelPhil9955112021/11/26 06:29 PM
Where Walter Jeremiah Sanders III, AMD founder, ended up nowdays?anon2021/11/25 09:42 AM
Does Apple's M1 support BTI (branch target identification)?Gabriele Svelto2021/11/25 02:53 AM
Samsung to another build fab in Texas.Brett2021/11/24 03:55 PM
Forum search more broken than before?Michael S2021/11/18 02:34 PM
Top 500, x86 missing from top 4, Intel lagging AMDanonymous22021/11/18 12:17 PM
Scaling beyond saturationhobold2021/11/10 05:24 AM
Detailed investigation of M1 load and store bandwidths from L1 out to DRAM---2021/11/09 02:39 PM
The slow death of technical contentPaul A. Clayton2021/11/08 06:51 AM
Alder Lake, not bad, but not as good as expectedAdrian2021/11/04 06:56 AM
Run uarch-bench on ADLTravis Downs2021/10/28 12:30 PM
M1 Max as a renderer---2021/10/25 09:31 PM
Intel IDM 2.0Mr. Camel2021/10/24 04:44 AM
Yitian 710 anonymous22021/10/20 08:57 PM
GB5 Compute results for M1 Max---2021/10/20 01:08 PM
Apple's "chop" dieDoug S2021/10/19 08:29 AM
Introducing M1 Pro and M1 Max: the most powerful chips Apple has ever builtM1 Max2021/10/18 10:59 AM
Details on NVIDIA BlueField-3 Programmable Datapath Accelerator?Paul A. Clayton2021/10/12 12:17 PM
CMOS power vs. temperatureDaniel B2021/10/08 09:27 AM
Apple A15 L1D$Mr. Camel2021/10/07 11:43 AM
Strange data point on PC performanceEtienne Lorrain2021/10/06 06:38 AM
Nios V RISC-V soft coresGabriele Svelto2021/10/06 12:28 AM
Removed thread about linux kernel moduleDavid Kanter2021/09/27 12:26 PM
fab capacity or Why are there no GPUs (by Nvidia) to be had?Moritz2021/09/22 06:40 AM
Armv8.8-A and Armv9.3-Aanonymou52021/09/16 03:25 PM
Extra Apple M1 informationAdrian2021/09/16 12:52 AM
z14 and z15 cache latencies?David Kanter2021/09/12 10:40 PM
alder lake.inteluser2021/09/10 02:52 AM
POWER10 SAP SD benchmarkanon22021/09/06 03:36 PM
Apple and RISC-Vvvid2021/09/03 10:47 AM
Did IBM Just Preview The Future of Caches?Kester L2021/09/02 08:45 AM
AVX512 as co-processorMichael S2021/08/29 03:13 AM
IBM's AMX - Apple's wayMichael S2021/08/24 03:43 AM
Check out my tutorial at Hot ChipsDavid Kanter2021/08/22 11:40 AM
Tesla Project Dojo and InFO_SoWnemo2021/08/20 09:56 AM
Was Intel Holding Back?Jon2021/08/19 07:49 AM
Alder Lake: 1st Intel/AMD CPU with 6 instruction decodersAdrian2021/08/19 06:21 AM
Very-large superscalar execution without the costHugo Décharnes2021/08/18 10:34 AM
Post RISC Banked Register InstructionsBrett2021/08/16 12:38 AM
Split TLBsmatthew2021/08/07 10:21 AM
Intel's Process Roadmap to 2025: with 4nm, 3nm, 20A and 18A?!Kester L2021/07/27 08:29 AM
AMX performance on M1 ?Michael S2021/07/27 03:01 AM
ARM Scalable Matrix Extensiondmcq2021/07/25 05:36 PM
Happy 25th anniversary RWTDavid Kanter2021/07/23 06:27 PM
Should variable symbols be "signed" with their length in bytes?Etienne Lorrain2021/07/23 02:40 AM
David – SNRanonymou52021/07/14 03:09 PM
inconsistent program state bug in Marvell Octeon TX2?Dummond D. Slow2021/07/12 03:12 PM
Is unsafe hell truly good for linux kernel in the future?cqwrteur2021/07/09 09:56 PM
Intel discontinued hybrid CPUsGionatan Danti2021/07/07 06:20 AM
High Bandwidth Memory on Xeon Sapphire RapidsJohn Clarke2021/07/03 07:01 PM
Intel to use TSMC 3nm anonymous22021/07/02 12:44 PM
Interesting ARM compatibility shim for Windows 11Beastian2021/07/01 02:48 PM
AMD EPYC Milan Review Part 2: Testing 8 to 64 Cores in a Production Platformanon2021/06/30 05:36 AM
Intel to disable TSX on (more) CPUsanonymous22021/06/28 02:54 PM
SiFive to provide its IP to Intel FoundryTriptych2021/06/22 07:24 AM
Intel Jasper Lake issue ratesIntelUser20002021/06/16 08:00 PM
component availability metadata2021/06/15 01:35 PM
Intel interested in acquiring SiFiveGabriele Svelto2021/06/11 01:50 AM
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