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Today's QC newsMaynard Handley2019/05/22 11:34 AM
A big plus for RISC V?dmcq2019/05/22 05:30 AM
Availability of POPCNT instruction? (x86-64)Antoine2019/05/22 01:49 AM
Clock Speed RegressionsJohn H2019/05/19 07:30 AM
an academic example of security validationhobold2019/05/19 01:58 AM
zen 2 12cdimaggio2019/05/18 03:15 AM
stupid question about SSDsMichael S2019/05/17 03:56 AM
Hardware Accelerated Garbage Collection UnitBeastian2019/05/16 02:10 PM
Hot Chips 31 Programnobody in particular2019/05/15 05:11 AM
New MDS vulnerabilities announced for Intel CPUs.Ligana2019/05/14 10:09 PM
Intel's roadmapLaurent2019/05/13 08:37 AM
Where do CPUs go next?Maynard Handley2019/05/12 01:38 PM
What happened to REX computing?chipguy2019/05/09 12:07 AM
Ice Lake-U die photoWes Felter2019/05/08 06:08 PM
SweRV Programmer's Reference ManualGabriele Svelto2019/05/08 12:31 AM
Cray & AMD win supercomputer contractAdrian2019/05/07 05:46 AM
Performance counter descriptionsTravis Downs2019/05/06 09:24 AM
Apple keyboard design and tech failureMaynard Handley2019/05/02 12:21 PM
Undocumented L1D cache eventTravis Downs2019/05/01 04:06 PM
Apple "processor supply constrained"?Meret2019/05/01 02:07 AM
TSMC updatesMaynard Handley2019/04/30 04:18 PM
Overlaid skewed associativityPaul A. Clayton2019/04/29 05:07 PM
TSMC uses Co for 7nmMaynard Handley2019/04/26 03:52 PM
Apple AWS spendingMaynard Handley2019/04/25 06:10 PM
IP protection on an SoCDoug S2019/04/24 11:36 AM
China Arm-based server chip company to closeanonymous22019/04/23 01:38 PM
Lakefield FoverosMaynard Handley2019/04/22 07:53 PM
Tesla's new FSD solutionWierdo2019/04/22 12:55 PM
Microsoft goes deterministicRobert Williams2019/04/19 01:21 PM
Expiry of x86-64 patentsBeastian2019/04/19 09:05 AM
Apple agrees to become Qualcomm's licensee and returns to their baseband chipsDummond D. Slow2019/04/18 04:47 PM
Tech side of Intel's 5G exitAM2019/04/18 09:35 AM
Wired Exclusive: What to Expect From Sony's Next-Gen PlayStationsleep2019/04/16 11:04 PM
What would trigger GF to pursue =< 7nm again?John H2019/04/16 02:10 PM
Is it possible to "repair" or bypass fuses in Intel CPUs?Doug S2019/04/15 11:37 AM
So Rambus thinks they have the solution to malicious speculative exectionRobert Williams2019/04/11 02:48 PM
LG's G8 Smartphone With Air Motion GesturesBrett2019/04/09 12:04 PM
Optane DC Motherboards?anonymous22019/04/07 11:22 AM
Triviablaine2019/04/05 11:36 PM
Cascade lake questions?David Kanter2019/04/01 11:53 AM
Intel VISA capabilities?Robert Williams2019/03/28 02:07 PM
Ampere eMAG available to rent for $1/hrWes Felter2019/03/28 12:23 PM
Fake Apple ARM benchmarkBrett2019/03/27 06:40 PM
How I joined MLPerfDavid Kanter2019/03/27 12:47 PM
Sometimes a micrcode update slows down your CPUTravis Downs2019/03/24 06:56 PM
Winchip 4Mr. Camel2019/03/20 04:23 AM
Intel Aurora & X^e compute architectureAdrian2019/03/18 09:53 PM
Western Digital's SweRV deep diveGabriele Svelto2019/03/15 04:53 AM
Basic Performance Measurements of the Intel Optane DC Persistent Memory ModuleWes Felter2019/03/14 07:34 PM
ASIC design expertise, opinion neededHoward Chu2019/03/14 04:11 PM
CXL interconnect specificationRobert Williams2019/03/11 10:40 AM
Nvidia acquires Mellanoxslacker2019/03/11 08:46 AM
Smother Spectre - SMT + execution unitsSecurity reader2019/03/06 03:47 PM
SPOILER: attack on store forwardinghobold2019/03/05 05:22 AM
More than you ever wanted to know about L2_RQSTSTravis Downs2019/02/28 12:27 PM
How is MASKMOVDQU implemented?Travis Downs2019/02/28 10:49 AM
Upgrade to new VM!David Kanter2019/02/24 03:18 PM
Kudos up for grabsdmcq2019/02/23 10:18 AM
Dual-architecture CPU?Charles2019/02/23 04:39 AM
E->M state transitionsTravis Downs2019/02/22 04:47 PM
forum is slowMichael S2019/02/22 06:32 AM
ARM announces Aresnobody in particular2019/02/20 08:35 AM
modern DDR4 array microphotos?Jeff S.2019/02/19 08:47 AM
ARM comes out with new vector instructions for m seriesAndrew Clough2019/02/14 11:08 AM
Looks like the rumor is finally realDoug S2019/02/08 12:41 PM
New ARMv8 memory modeldmcq2019/02/06 03:34 PM
Cooper Lake with an Sunny inside? :)Alberto2019/02/06 06:25 AM
First steps to cleaning up x86?john2019/02/02 03:15 PM
Western Digital SweRV RISC-V core is on GitHubGabriele Svelto2019/02/02 06:59 AM
Robert Swan named permenant Intel CEOAndrew Clough2019/01/31 08:18 AM
The official end of ItaniumJohn H2019/01/31 03:16 AM
Anandtech deep dive of Cannon LakeAnon2019/01/26 02:06 AM
Stack scratchpad to break the 2 load port limit?Brett2019/01/24 12:42 AM
Static sites and forums for RWT?David Kanter2019/01/21 09:11 AM
Is a zero register useful with modern OoO?anonymous22019/01/20 02:25 PM
255W TDP = 8-bit integer?John2019/01/18 05:52 AM
Qualcomm monopoly overreachBrett2019/01/16 05:59 PM
arithmetic/logic op fusionMaynard Handley2019/01/16 05:01 PM
All seniors to get health watches?Brett2019/01/16 04:29 PM
Qualcomm Centriq 'rebird' as StarDragon 4800juanrga2019/01/15 11:41 AM
Intel Values Their Own iGPUs At Exactly ZeroVertexMaster2019/01/13 07:28 PM
AMD CESsomeguy2019/01/10 02:06 PM
Disapointing NVidia Carmel core SPEC resultsAndrew Clough2019/01/07 08:47 AM
iPad Pro Wolfram Player updateMaynard Handley2019/01/06 03:56 PM
Cannonlake notesTravis Downs2018/12/31 12:47 AM
Mobile Network Providers part of a problem, not a solution any longerMaynard, one question2018/12/30 07:28 PM
Independent micro threadsBrett2018/12/30 01:55 PM
Eager execution (Speculative Execution)Domaldel2018/12/29 04:12 AM
Samgung foundry viability for high performance high volume logicanon2018/12/24 11:26 PM
SAP SD 2-tier benchmark for POWER9 anon2018/12/21 11:25 AM
Updated CPU infoPer Hesselgren2018/12/21 02:35 AM
IBM Going with Samsung after dumping GlobalFoundriesAnon2018/12/20 12:07 PM
RISC-V Summit ProceedingsGabriele Svelto2018/12/19 09:36 AM
IP 97.93.98.254 - we blocked your botDavid Kanter2018/12/18 12:24 PM
Arm adds SMT, a defeat in efficiency?none2018/12/18 10:10 AM
HC30 content open to publicjuanrga2018/12/18 04:11 AM
MIPS Goes Open SourceAdrian2018/12/17 01:02 PM
MLPerf v0.5 training resultsDavid Kanter2018/12/12 03:03 PM
Sunny Cove wideSeni2018/12/12 02:58 PM
Sunny Cove address space increaseanonymous22018/12/12 10:08 AM
QuickPath/UltraPath link encryption?Jeff S.2018/12/11 02:16 PM
Qualcomm lays off 269 from data center unit. The unit is gone.john2018/12/07 03:50 PM
Intel 7 nm "on track"? 10 nm to be mostly skipped?Wes Felter2018/12/06 01:21 PM
Case for Apple to design server CPU?Doug S2018/12/05 11:07 AM
GCC is a fine compiler, but... once moreMichael S2018/12/04 05:54 AM
TB3 DeveloperMr. Camel2018/12/03 10:34 AM
Calculating Peak FMA throughput on CPUsanonymous22018/12/03 09:10 AM
Gromacs: Zen AVX2 vs AVX512 Larrabeejustcurious2018/12/01 04:18 PM
How tightly coupled is uArch/implementation to ISA on modern OoO CPUs?anonymous22018/11/29 11:50 AM
Amazon EC2 Instances (A1) Powered by Arm-Based AWS Graviton Processorsdbcooper2018/11/26 10:17 PM
Intel 10nm COAC broken?Brett2018/11/25 08:42 PM
Amazon's special Skylake SauceTravis Downs2018/11/25 02:50 PM
Where is Apple headed?Maynard Handley2018/11/25 10:47 AM
Huawei HiSilicon ARM server chips that Im sure you can totally buyWes Felter2018/11/20 12:23 PM
L2 bandwidth on SkylakeTravis Downs2018/11/19 05:24 PM
MRAM at VLSI 2018David Kanter2018/11/19 02:40 PM
STIPB performance hitTravis Downs2018/11/18 11:13 AM
Apple will design its own 5G modem (and 8 reasons why)AM2018/11/15 11:59 AM
the next 7 (Meltdown & Spectre)hobold2018/11/15 06:17 AM
Why only ~10 fill buffers?Travis Downs2018/11/13 12:40 PM
A12X packagingMaynard Handley2018/11/12 07:24 PM
Intel Xeon AVX-512 units per coreanonymous22018/11/12 02:34 PM
ThunderX2 Enters the Top 500nobody in particular2018/11/12 09:55 AM
Interview with PapermasterAM2018/11/12 08:46 AM
Epyc 2 needs no frequency drop for 256-bit AVXAdrian2018/11/12 08:41 AM
Why Intel Processors Draw More Power Than Expected: TDP and Turbo Explained @ AnandtechGabriele Svelto2018/11/12 06:08 AM
Phoronix Power 9 BenchmarksBeastian2018/11/10 10:13 AM
How does dual-SIM work on non-iOS?Maynard Handley2018/11/08 04:12 PM
Ars Technica A12X walk throughDoug S2018/11/07 02:30 PM
AnandTech SPEC2006 scores for ARM SoCGian-Carlo Pascutto2018/11/07 01:29 AM
People still betting on QC might want to rethink thatMaynard Handley2018/11/06 09:37 PM
Zen2 socket compatibleGoose2018/11/06 03:15 PM
Why no EMIB?dmcq2018/11/06 03:45 AM
Apple-Intel benchmark other than GeekBenchAdrian2018/11/05 10:38 PM
PoemKyle Siefring2018/11/05 06:57 AM
Portsmash SMT side-channel exploitBeastian2018/11/02 08:15 AM
Peak iPhoneBrett2018/11/01 06:55 PM
epyc 2 controllerdimagio2018/10/31 10:17 AM
David visits AustraliaDavid Kanter2018/10/30 06:05 PM
Latency data TR 2990WXPer Hesselgren2018/10/26 02:19 PM
Zhaoxin at 1.8GHzPer Hesselgren2018/10/26 02:07 PM
Some hopes on Ice LakeAlberto2018/10/24 09:19 AM
ARM battery life revisitedMaynard Handley2018/10/23 01:51 PM
Arm Research Summitdmcq2018/10/22 06:15 AM
Intel pulls plug on 10nm?AM2018/10/22 04:43 AM
Intel reorg / 10nm troubles articleDoug S2018/10/17 11:35 AM
Cache coherent GPU/CPU interface in consumer? CatMerc2018/10/17 08:11 AM
ARM's new turn towards serversAdrian2018/10/17 02:09 AM
Cannon Lakecnl2018/10/16 12:57 AM
Ampere eMAG ARM servers availableAM2018/10/11 09:19 AM
Cloudflare jumps to custom Intelnobody in particular2018/10/10 08:55 AM
VLSI 2018: IBM's machine learning acceleratorDavid Kanter2018/10/09 02:28 PM
L1TF HW fix on 9900Ktm.at.VR2018/10/09 02:45 AM
hmmmMaynard Handley2018/10/08 05:58 PM
Present and Future of Computinganon2018/10/07 06:54 AM
Should Apple start making servers?Doug S2018/10/05 11:48 PM
Apple A12 SPEC2006VertexMaster2018/10/05 07:08 AM
TSMC staying on roadmapDoug S2018/10/04 01:53 PM
Supply chains and trustDavid Kanter2018/10/04 08:23 AM
makerchip.com and WARP-V core CPU core generatorGabriele Svelto2018/10/02 07:25 AM
uop replay after L1 missTravis Downs2018/09/30 06:25 PM
Apple wins (for now?) against Moshovos patentMaynard Handley2018/09/29 12:04 AM
SMM/EL3 does work on Apple CPUsMaynard Handley2018/09/28 03:38 PM
How will the L1 cache look like?Per Hesselgren2018/09/27 07:42 AM
Why have none of the alternative RAMs taken off?a random lady2018/09/27 07:06 AM
Articles from VLSI symposiumDavid Kanter2018/09/26 09:05 PM
epyc 2dimagio2018/09/26 12:34 AM
A12 die shotMaynard Handley2018/09/25 10:43 AM
More about A12 on board cores Maynard Handley2018/09/22 11:12 PM
MultiChip Rumorstm.at.VR2018/09/21 12:32 AM
Ampere eMAG ARM processorsGabriele Svelto2018/09/19 02:37 PM
M-state and L1 cache writebacksTravis Downs2018/09/18 08:40 PM
GB4 A12 results (vs Snapdragon 845)anonymous22018/09/18 08:12 PM
Hey passing throughDavid Kanter2018/09/17 04:39 PM
4-cycle L1 latency on Intel not as general as thoughTravis Downs2018/09/17 04:32 PM
Intel's latest baseband contains an x86 CPUGabriele Svelto2018/09/16 12:41 PM
POWER9 deployment at GoogleGabriele Svelto2018/09/16 01:08 AM
Filling some gaps in A12/iPhone and Kirin 980AM2018/09/14 08:27 AM
A12 GB4Maynard Handley2018/09/13 02:18 PM
Flux Generators?Brett2018/09/13 10:32 AM
Environmental requirementsdmcq2018/09/13 07:28 AM
Meltdown fixed in 9000 series?hobold2018/09/13 05:48 AM
A12 pointer authenticationDoug S2018/09/12 03:46 PM
What is an Ultra Book, and why does it matter anyway?Passing Through2018/09/11 02:59 PM
Intel's Manufacturing NetworkMr. Camel2018/09/10 06:23 PM
Rpi BCM chips - Who fabs what process?John H2018/09/09 09:24 AM
Water cooling versus Immersiondmcq2018/09/07 07:55 AM
Pinebook: Minimalist ARM laptop @ $99some.person2018/09/05 02:20 PM
Intel's Configurable Spatial AcceleratorBhima2018/09/02 03:25 AM
Intel's platform power draw (video playback) in near futureAM2018/09/01 07:28 AM
Why was astar removed from SPEC 2017?anonanon2018/08/31 09:12 PM
Kirin980 introducedAM2018/08/31 08:31 AM
Globalfoundries "14nm/12nm" customers? Other than AMD?Heikki Kultala2018/08/31 12:52 AM
exynos on the open marketMichael S2018/08/29 03:22 AM
GF fails, quits 7nm, becomes a relic of the pastnoon2018/08/27 01:58 PM
Dirty upper 256 causes everything to run at AVX-512 frequenciesTravis2018/08/24 05:32 PM
Some TravisCI instances are running on ZenTravis2018/08/24 03:04 PM
let's discuss NEC's improved vector engine tooMichael S2018/08/24 05:07 AM
AVX-512 downclocking not as bad as thought?Travis2018/08/24 01:01 AM
BOOM RISC-V siliconWes Felter2018/08/23 12:39 PM
TIL: something weird about vzeroallTravis2018/08/21 09:46 PM
Fujitsu unveils Arm V8-A SVE coreBeastian2018/08/21 08:09 PM
Nantero nanotube memorydmcq2018/08/21 03:18 PM
Threadripper 2990WX compilation performanceAdrian2018/08/19 10:19 PM
Powerful ARM hw for saleAM2018/08/19 08:06 AM
80486DX annotated die shotjuanrga2018/08/18 04:00 AM
ARM turns to a god and a heroAM2018/08/16 09:32 AM
Intel launched CNL-equipped NUCAM2018/08/16 05:58 AM
AVX2 and AVX-512 frequencies for W-2014Travis2018/08/14 08:37 PM
Free compiler that generates PowerPC VLE?Michael S2018/08/14 06:56 AM
Nvidia TuringTuring2018/08/13 06:49 PM
Threadripper 32 core reviewPer Hesselgren2018/08/13 08:50 AM
Building gcc from source. Headers.Michael S2018/08/11 02:12 PM
Poll Cores vs per thread performance value Jouni Osmala2018/08/06 12:03 AM
Virus impacts TSMC fabrication toolsDoug S2018/08/04 02:51 PM
TIL: simple vs complex addressing is resolved at rename time (probably)Travis2018/08/03 01:34 PM
AMD cache SRAM types?Heikki Kultala2018/08/01 11:48 PM
Weird L2 latency effectTravis2018/08/01 10:01 PM
Critical word firstTravis Downs2018/08/01 02:10 PM
What does (number)T mean in mfg process specs?Heikki Kultala2018/08/01 05:41 AM
Hot Chips 30 (Aug 19-21)Jeff S.2018/07/31 12:46 PM
NetSpectre: Read Arbitrary Memory over Networkanon2018/07/30 11:50 AM
Icelake has doubles L2 CacheCharlie2018/07/29 04:47 PM
Intel further delays 10nmDoug S2018/07/27 11:55 AM
Ha ha ha ha haMaynard Handley2018/07/25 04:42 PM
Darpa chip initiativefoobaz2018/07/24 02:32 PM
IBM Meltdown APARs (patches) for zOS on Zrwessel2018/07/24 07:25 AM
Samsung's GPUDavid Kanter2018/07/23 09:21 PM
New article on Intel's 3DXPDavid Kanter2018/07/23 10:02 AM
RWT: 22 years old!David Kanter2018/07/23 07:45 AM
Interaction between L1 and L2 in a non-inclusive/exclusive designTravis2018/07/21 07:51 PM
Some Qualcomm staff words about upcoming overrated 7nm and 5nm nodesAlberto2018/07/20 08:37 AM
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