anon (anon@anon.com) on 7/21/10 wrote:
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>? (0xe2.0x9a.0x9b@gmail.com) on 7/21/10 wrote:
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>>anon (anon@anon.com) on 7/21/10 wrote:
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>>>On the contrary, I think your assertion that pipelining requires speculative execution is wrong.

Notice the word "requires" in your sentence.

>>I am not saying that. I am saying this: Pipelining, the way it is implemented in
>>current CPUs (e.g: Core2), involves certain assumptions

No "requires" here. That is because I was trying to explicitly avoid it.

>I'm sorry, but you're just modifying your argument as you go along now. You can't
>tell me you were talking specifically about x86 and constraints of market realities
>in CPU design. Because we can all read what you posted to Linus.

No problem

>"NOTE that this theoretical OoO CPU I am mentioning here
>is *not* doing any *speculation* (except maybe those
>which also present in the in-order CPU). Once you have
>speculation, there by necessity exist some cases in which
>the CPU's prediction engine will make a wrong decision.
>
>Even mere pipelining entails a small dose of speculative
>execution !!!

Yes, it is slightly confusing. In the 1st paragraph I was talking about a "theoretical CPU", while in the 2nd I meant practical implementations of pipelining.

>I will repeat it one more time, because it seems to me
>that you are completely missing this: Even mere
>pipelining entails a small dose of speculation !!!"
>
>You are clearliy talking about theoretical designs, and you were saying that pipelining requires speculation.

So you want me to write a 50 pages long article in which I can it more clear? This is a discussion forum, the number of words I could have used is very limited.

>snip

(1) In the snipped text, I did not use the word "execution" anywhere. I use the word "speculative-ness".

>>>Caches have nothing to do with speculative execution that you were talking about.

(2) You jumped to the conclusion that I was talking about speculative execution. I was not. I was talking about speculative-ness in general.

>>What are you saying? That if a contemporary CPU (Core2 or whatever) decides to
>>allocate a cache-line for data at address 0x1230, it is not making any speculations
>>about future uses of that piece of data?

(3) I don't see any word "execution" there.

>>(Note: I am *not* against caches)
>>
>
>Yes there is a speculative nature about caches, of course it is nothing to do with
>speculative execution

(4) Again, you used the word "execution".

>or anything in the CPU pipeline which is what this discussion
>was supposed to be about (out of order versus in order, pipelining, speculative execution etc). I'll quote you again
>
>"Even mere pipelining entails a small dose of speculative
>execution !!!"

In *actual* x86 CPUs pipelining is implemented in a way which entails speculative *execution*. As far as I can tell, Linus and Ian were talking about actual CPUs, so that sentence of mine was intended to make sense in that context.

I am not denying that pipelining as a theoretical concept does not necessarily imply speculative execution. But in practice, it mostly does.

>I'm not saying you don't know the difference, but I'm saying that the argument
>about execution engines is only muddied by you bringing up caches.

That's because you are trying to force the word "execution" into my texts ...