Richard Cownie (tich@pobox.com) on 8/3/10 wrote:
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[...]
>http://arstechnica.com/hardware/reviews/2008/11/nehalem-launch-review.ars/4
>>
>
>... showing cache bandwidth of about 12GB/sec (though
>maybe you could boost that using multiple threads ?)
>
>And you get factor of 1024/12 which is about 85x.

This looks half of what it should be, as I'd expect one
64-bit read/cycle which would give about 25 GB/s. Multiply
by the number of cores, let's say 4 or 6, and you reach 100
or 150 GB/s. That's only 6-10x less than the 1 TB/s figure
you quoted for ATI, less impressive heh? :)

I might be wrong about the i7 being able to read 64b/cycle
from its L1 cache but even if we keep the figure of
12 GB/sec, one has to multiply it by the number of cores, 4
or 6. Still very far from 100x...