someone (someone@somewhere.com) on 11/17/10 wrote:
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>>Avoiding OoO probably made a lot more sense 10 years ago than it does now.

Not really. It might have made sense in 1995. It didn't
make much sense after 1996, when PentiumPro had showed
what OoO could do.

>Simply building an OOOE IPF processor does not negate
>the value of IA64's parallel scheduling and execution hint
>information passing from compiler to hardware. It likely
>means you can achieve a higher performance for a given
>complexity and sophistication of OOOE logic than would
>an implementation of a serial execution model ISA like
>x86 and Power.

Very questionable. The information that compilers are
good at figuring out is rather low-level: but OoO
implementations can figure out that same information
dynamically (and *must* do so to be competitive these
days - e.g. sophisticated branch prediction and
address alias analysis) and in many cases more accurately
than any static analysis could possibly achieve.

So all those hints, rather than being the only information
you have, now have to be combined with the OoO's dynamic
information to figure out what to do. And it's possible
that the best strategy might be to ignore them all
completely ...

But for sure, if Intel are really going to keep on building
new IA64 cpu's, they should make them as good as they can,
whether OoO or not. I just don't see any reason to think
that an ISA contorted to avoid the need for OoO and
register renaming is magically going to provide benefits
for an OoO implementation. That would be very weird.