By: someone (someone.delete@this.somewhere.com), November 17, 2010 2:59 pm
Room: Moderated Discussions
Richard Cownie (tich@pobox.com) on 11/17/10 wrote:
---------------------------
>someone (someone@somewhere.com) on 11/17/10 wrote:
>---------------------------
>
>>>Avoiding OoO probably made a lot more sense 10 years ago than it does now.
>
>Not really. It might have made sense in 1995. It didn't
>make much sense after 1996, when PentiumPro had showed
>what OoO could do.
>
>>Simply building an OOOE IPF processor does not negate
>>the value of IA64's parallel scheduling and execution hint
>>information passing from compiler to hardware. It likely
>>means you can achieve a higher performance for a given
>>complexity and sophistication of OOOE logic than would
>>an implementation of a serial execution model ISA like
>>x86 and Power.
>
>Very questionable. The information that compilers are
>good at figuring out is rather low-level: but OoO
>implementations can figure out that same information
>dynamically (and *must* do so to be competitive these
>days - e.g. sophisticated branch prediction and
>address alias analysis) and in many cases more accurately
>than any static analysis could possibly achieve.
>
>So all those hints, rather than being the only information
>you have, now have to be combined with the OoO's dynamic
>information to figure out what to do. And it's possible
>that the best strategy might be to ignore them all
>completely ...
Maybe. Or maybe its valuable information residing in
existing IA64 binaries that a new OOOE uarch can
exploit to either simplify the control logic and reduce
power or redirect some of scheduling/dependency
checking logic transistors to better use by extending
the OOOE window etc.
>
>But for sure, if Intel are really going to keep on building
>new IA64 cpu's, they should make them as good as they can,
>whether OoO or not. I just don't see any reason to think
>that an ISA contorted to avoid the need for OoO and
>register renaming is magically going to provide benefits
>for an OoO implementation. That would be very weird.
>
It burns a lot of power using hundreds of thousands of
logic transistors re-discovering something about a scrap
of code every single loop iteration or subroutine call for
every execution of all copies of program that one compiler
need only to discern once. Everything can't be discovered
at compile time but it is stupid to ignore that which can
be and then passed on using a suitable equipped ISA.
---------------------------
>someone (someone@somewhere.com) on 11/17/10 wrote:
>---------------------------
>
>>>Avoiding OoO probably made a lot more sense 10 years ago than it does now.
>
>Not really. It might have made sense in 1995. It didn't
>make much sense after 1996, when PentiumPro had showed
>what OoO could do.
>
>>Simply building an OOOE IPF processor does not negate
>>the value of IA64's parallel scheduling and execution hint
>>information passing from compiler to hardware. It likely
>>means you can achieve a higher performance for a given
>>complexity and sophistication of OOOE logic than would
>>an implementation of a serial execution model ISA like
>>x86 and Power.
>
>Very questionable. The information that compilers are
>good at figuring out is rather low-level: but OoO
>implementations can figure out that same information
>dynamically (and *must* do so to be competitive these
>days - e.g. sophisticated branch prediction and
>address alias analysis) and in many cases more accurately
>than any static analysis could possibly achieve.
>
>So all those hints, rather than being the only information
>you have, now have to be combined with the OoO's dynamic
>information to figure out what to do. And it's possible
>that the best strategy might be to ignore them all
>completely ...
Maybe. Or maybe its valuable information residing in
existing IA64 binaries that a new OOOE uarch can
exploit to either simplify the control logic and reduce
power or redirect some of scheduling/dependency
checking logic transistors to better use by extending
the OOOE window etc.
>
>But for sure, if Intel are really going to keep on building
>new IA64 cpu's, they should make them as good as they can,
>whether OoO or not. I just don't see any reason to think
>that an ISA contorted to avoid the need for OoO and
>register renaming is magically going to provide benefits
>for an OoO implementation. That would be very weird.
>
It burns a lot of power using hundreds of thousands of
logic transistors re-discovering something about a scrap
of code every single loop iteration or subroutine call for
every execution of all copies of program that one compiler
need only to discern once. Everything can't be discovered
at compile time but it is stupid to ignore that which can
be and then passed on using a suitable equipped ISA.
