someone (someone@somewhere.com) on 11/17/10 wrote:
---------------------------
>Richard Cownie (tich@pobox.com) on 11/17/10 wrote:
>---------------------------

>>But for sure, if Intel are really going to keep on building
>>new IA64 cpu's, they should make them as good as they can,
>>whether OoO or not. I just don't see any reason to think
>>that an ISA contorted to avoid the need for OoO and
>>register renaming is magically going to provide benefits
>>for an OoO implementation. That would be very weird.
>>
>
>It burns a lot of power using hundreds of thousands of
>logic transistors re-discovering something about a scrap
>of code every single loop iteration or subroutine call for
>every execution of all copies of program that one compiler
>need only to discern once. Everything can't be discovered
>at compile time but it is stupid to ignore that which can
>be and then passed on using a suitable equipped ISA.

I don't think you can really call a sane OoOE implementation "heroic" and "burning lots of power" any more. That may have been true around P4 era when they apparently tried to make frequency and fill execution units at all costs without thinking much about power or MLP (cache misses were very much a second class citizen in Netburst). Nowadays you have very tiny and efficient OOOE cores, as well as large and incredibly powerful and still quite efficient cores (Westmere/POWER7).