anon (no@reply.please) on 1/19/11 wrote:
---------------------------

>I'd also remark that the ARM-designed microarchitectures were also amateurish up
>to and including ARM11. They didn't really figure out what they were doing on that
>front until R4/A8/A9 (which are at least competitive)

It's a bit baffling to suggest that both the ISA and the
implementations are badly flawed. So how did it succeed ?
It certainly wasn't because ARM ltd had any fabulous
market power: it's a small company and never had anything
like the technical or marketing resources of PowerPC or
MIPS. So maybe they did *something* right ...

But perhaps the answer is that those billions of embedded
ARMs didn't really get their design wins by competing
against PowerPC or MIPS or x86 - all of those were too big,
too expensive, and and too power-hungry. ARM replaced
8051 and other 8bit and 16bit microcontrollers - and ARM
is vastly nicer to program than those, and much faster.

I think the bottom line is that what you see as "amateurish"
is equally well interpreted as a very successful attempt
to work within tight constraints of transistor count,
power envelope, and cost for particular market segments.
It remains to be seen whether they can scale it up
to play against x86 in higher-performance devices - though
already the iPad is big hit.

As for the choice of only 16 registers, I can say that
was partly due to concerns about interrupt latency -
which I think is still a valid concern for embedded cores
without caches - and partly due the desire to boost IPC
in simple, but pipelined, implementations. Which it does
very successfully. Compare and contrast with SPARC's
"let's have lots and lots of registers" approach, chosen
around the same time, and ARM's frugality looks just fine.