Article: IEDM 2010 Process Technology Update
By: Ricardo B (ricardo.b.delete@this.xxxxx.xx), February 15, 2011 5:54 am
Room: Moderated Discussions
Nice article, David.
Thanks
«The high voltage I/O transistors are even larger and are formed with a gate oxide that is 4-7X thicker to deal with the higher voltages in the 1.8-3.3V range. This is a substantial improvement over the 45nm process, which did not have 3.3V transistors, as PCI-Express and other interconnects use 3.3V signaling.»
PCIe is LVDS, thus 2.5V suffice.
Maybe you were thinking of PCI-X?
Thanks
«The high voltage I/O transistors are even larger and are formed with a gate oxide that is 4-7X thicker to deal with the higher voltages in the 1.8-3.3V range. This is a substantial improvement over the 45nm process, which did not have 3.3V transistors, as PCI-Express and other interconnects use 3.3V signaling.»
PCIe is LVDS, thus 2.5V suffice.
Maybe you were thinking of PCI-X?
Topic | Posted By | Date |
---|---|---|
IEDM 2010 article online | David Kanter | 2011/02/15 01:59 AM |
IEDM 2010 article online | Ricardo B | 2011/02/15 05:54 AM |
IEDM 2010 article online | David Kanter | 2011/02/15 09:37 AM |
IEDM 2010 article online | Ricardo B | 2011/02/15 03:03 PM |
IEDM 2010 article online | slacker | 2011/02/15 06:15 PM |
IEDM 2010 article online | IntelUser2000 | 2011/02/15 06:54 PM |
IEDM 2010 article online | David Kanter | 2011/02/15 08:49 PM |
IEDM 2010 article online | David Hess | 2011/02/16 02:40 AM |
IEDM 2010 article online | Ricardo B | 2011/02/16 07:01 AM |
IEDM 2010 article online | IntelUser2000 | 2011/02/17 09:21 AM |
Answer: 8um | slacker | 2011/02/17 10:01 AM |
IEDM 2010 article online | someone | 2011/02/17 09:14 AM |
IEDM 2010 article online | iz | 2011/02/17 06:31 PM |
IEDM 2010 article online | iz | 2011/02/17 07:04 PM |
Also fixed | David Kanter | 2011/02/17 07:47 PM |
IEDM 2010 article online | David Kanter | 2011/02/17 07:43 PM |