David Kanter (dkanter@realworldtech.com) on 2/15/11 wrote:
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>As always, comments and feedback are welcome.

Very good article David.

Typically the choice of regular or low leakage transistors
is signal path dependent rather than defined on a block by
clock basis.

A common approach is design logic using only low leakage
transistors, identify critical timing paths, and systematically
replace low leakage transistors along critical signal paths
with regular transistors until either timing gains flatten or the
block power budget is reached. The portion of higher power
transistors after optimization seldom exceeds ~10%.