IEDM 2010 article online

Article: IEDM 2010 Process Technology Update
By: iz (i.delete@this.z.x), February 17, 2011 7:04 pm
Room: Moderated Discussions
  The 1Mbit eDRAM macros used in the POWER7 are 0.24mm2 with
a 1.05V supply and 1.7ns/1.35 access and cycle times. The
overall density for the 32nm eDRAM arrays was not disclosed
but should be >11Mbit/mm2 density, based on a previous
paper at VLSI Symposium. The reported access and cycle
times for the 32nm array were measured at 1.5ns and 2ns
at 1V. These latency values are slightly slower than the
45nm arrays (1.35ns and 1.5ns) used in the POWER7, and
will certainly be refined by IBM’s engineers over time.

Seems like access and cycle time got mixed up. I guess it's:
"The reported cycle and access times" and also
"1.35ns and 1.7ns".

"Slightly higher latencies" is slightly easier on the brain.
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IEDM 2010 article onlineDavid Kanter2011/02/15 01:59 AM
  IEDM 2010 article onlineRicardo B2011/02/15 05:54 AM
    IEDM 2010 article onlineDavid Kanter2011/02/15 09:37 AM
      IEDM 2010 article onlineRicardo B2011/02/15 03:03 PM
  IEDM 2010 article onlineslacker2011/02/15 06:15 PM
    IEDM 2010 article onlineIntelUser20002011/02/15 06:54 PM
    IEDM 2010 article onlineDavid Kanter2011/02/15 08:49 PM
      IEDM 2010 article onlineDavid Hess2011/02/16 02:40 AM
      IEDM 2010 article onlineRicardo B2011/02/16 07:01 AM
      IEDM 2010 article onlineIntelUser20002011/02/17 09:21 AM
        Answer: 8umslacker2011/02/17 10:01 AM
  IEDM 2010 article onlinesomeone2011/02/17 09:14 AM
  IEDM 2010 article onlineiz2011/02/17 06:31 PM
    IEDM 2010 article onlineiz2011/02/17 07:04 PM
      Also fixedDavid Kanter2011/02/17 07:47 PM
    IEDM 2010 article onlineDavid Kanter2011/02/17 07:43 PM
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