Article: 22nm Design Challenges at ISSCC 2011
By: someone (someone.delete@this.somewhere.com), March 15, 2011 6:26 am
Room: Moderated Discussions
Moritz (moritzgedig.spam@arcor.de) on 3/15/11 wrote:
---------------------------
>someone (someone@somewhere.com) on 3/14/11 wrote:
>---------------------------
>>A decade ago I heard an design manager at AMD, an ex
>>DEC Alpha type, complain about how it was to recruit
>>EEs who knew anything about circuits and device physics.
>>All the new grads he interviewed were Verilog cowboys
>>who wanted to code up MPUs and had no desire to know
>>how transistors worked and interacted. Unless this trend
>>has changed (I have no reason to believe that it has) the
>>major IC designers are going to have to train new people
>>themselves to address these ever growing challenges.
>
>At my University we did learn both. (I'm a Student of electronics not computer-science.
>We had both solid-state physics and programing/HDL)
>Still, they can not honestly be complaining about young people not having 10 years of expertise.
>A reality check would be the only cure for the problem.
I don't believe I wrote anything about this AMD manager
expecting 10 years of experience.
When I was at school I did full custom MOS circuit design
and layout and tested my chips after fabrication. We also
had a full grounding in analog design including complex
and non-linear circuit analysis techniques as well as Q.M.
and solid state physics.
---------------------------
>someone (someone@somewhere.com) on 3/14/11 wrote:
>---------------------------
>>A decade ago I heard an design manager at AMD, an ex
>>DEC Alpha type, complain about how it was to recruit
>>EEs who knew anything about circuits and device physics.
>>All the new grads he interviewed were Verilog cowboys
>>who wanted to code up MPUs and had no desire to know
>>how transistors worked and interacted. Unless this trend
>>has changed (I have no reason to believe that it has) the
>>major IC designers are going to have to train new people
>>themselves to address these ever growing challenges.
>
>At my University we did learn both. (I'm a Student of electronics not computer-science.
>We had both solid-state physics and programing/HDL)
>Still, they can not honestly be complaining about young people not having 10 years of expertise.
>A reality check would be the only cure for the problem.
I don't believe I wrote anything about this AMD manager
expecting 10 years of experience.
When I was at school I did full custom MOS circuit design
and layout and tested my chips after fabrication. We also
had a full grounding in analog design including complex
and non-linear circuit analysis techniques as well as Q.M.
and solid state physics.
| Topic | Posted By | Date |
|---|---|---|
| Design Challenges at 22nm Article | David Kanter | 2011/03/14 12:36 AM |
| Design Challenges at 22nm Article | Dean Calver | 2011/03/14 01:06 AM |
| Design Challenges at 22nm Article | David Kanter | 2011/03/14 08:06 PM |
| Design Challenges at 22nm Article | savantu | 2011/03/15 04:25 AM |
| Roots of this problem go way back. | someone | 2011/03/14 06:00 AM |
| Education | Moritz | 2011/03/15 03:42 AM |
| Education | someone | 2011/03/15 06:26 AM |
| Education | Moritz | 2011/03/15 11:44 AM |
| Education | sylt | 2011/03/18 09:31 AM |
| Roots of this problem go way back. | Rob Thorpe | 2011/03/15 05:25 AM |
| Roots of this problem go way back. | someone | 2011/03/15 06:20 AM |
| Roots of this problem go way back. | Nathan Monson | 2011/03/15 08:17 AM |
| Roots of this problem go way back. | mpx | 2011/03/15 11:55 AM |
| Roots of this problem go way back. | Mark Roulo | 2011/03/15 01:34 PM |
| Roots of this problem go way back. | Rob Thorpe | 2011/03/15 03:42 PM |
| Roots of this problem go way back. | Paul | 2011/03/15 04:03 PM |
| Roots of this problem go way back. | Dean Kent | 2011/03/15 07:11 AM |
| Design Challenges at 22nm Article | Daniel Bizo | 2011/03/14 06:06 AM |
| Design Challenges at 22nm Article | Linus Torvalds | 2011/03/14 08:48 AM |
| Design Challenges at 22nm Article | David Kanter | 2011/03/14 08:20 PM |
| Design Challenges at 22nm Article | Dean Kent | 2011/03/15 07:16 AM |
| Design Challenges at 22nm Article | David Kanter | 2011/03/14 09:05 AM |
| Could you elaborate? | Daniel Bizó | 2011/03/16 05:43 AM |
| IDM trade offs | David Kanter | 2011/03/16 09:54 AM |
| Design Challenges at 22nm Article | Tianyi | 2012/10/17 11:24 PM |
