Article: 22nm Design Challenges at ISSCC 2011
By: Dean Kent (dkent.delete@this.realworldtech.com), March 15, 2011 8:16 am
Room: Moderated Discussions
Linus Torvalds (torvalds@linux-foundation.org) on 3/14/11 wrote:
---------------------------
>Daniel Bizo (dbizo@idc.com) on 3/14/11 wrote:
>>
>>A conclusion not articulated by the article itself is that the IDM model becomes
>>even more desirable for those who can economically afford and sustain it. Chip
>>desingers which can keep financing cutting edge process R&D and manufacturing will
>>increasingly levarage the integrated model unless they badly screw up on the architectural side.
>
>Well, the other side of that is the question about what
>happens when shrinking ends. Oh, I'm sure that process
>tweaking will go on for a long time (new materials, new
>tricks like straining, etc etc), but the advantages will
>likely not be as stunning.
>
Not sure how soon, or how practical, the technology is, but take a look at the news item I posted this morning on 'spintronics' which allegedly could improve power and speed without having to shrink the transistors - effectively doubling the capacity in the same process size.
---------------------------
>Daniel Bizo (dbizo@idc.com) on 3/14/11 wrote:
>>
>>A conclusion not articulated by the article itself is that the IDM model becomes
>>even more desirable for those who can economically afford and sustain it. Chip
>>desingers which can keep financing cutting edge process R&D and manufacturing will
>>increasingly levarage the integrated model unless they badly screw up on the architectural side.
>
>Well, the other side of that is the question about what
>happens when shrinking ends. Oh, I'm sure that process
>tweaking will go on for a long time (new materials, new
>tricks like straining, etc etc), but the advantages will
>likely not be as stunning.
>
Not sure how soon, or how practical, the technology is, but take a look at the news item I posted this morning on 'spintronics' which allegedly could improve power and speed without having to shrink the transistors - effectively doubling the capacity in the same process size.
| Topic | Posted By | Date |
|---|---|---|
| Design Challenges at 22nm Article | David Kanter | 2011/03/14 01:36 AM |
| Design Challenges at 22nm Article | Dean Calver | 2011/03/14 02:06 AM |
| Design Challenges at 22nm Article | David Kanter | 2011/03/14 09:06 PM |
| Design Challenges at 22nm Article | savantu | 2011/03/15 05:25 AM |
| Roots of this problem go way back. | someone | 2011/03/14 07:00 AM |
| Education | Moritz | 2011/03/15 04:42 AM |
| Education | someone | 2011/03/15 07:26 AM |
| Education | Moritz | 2011/03/15 12:44 PM |
| Education | sylt | 2011/03/18 10:31 AM |
| Roots of this problem go way back. | Rob Thorpe | 2011/03/15 06:25 AM |
| Roots of this problem go way back. | someone | 2011/03/15 07:20 AM |
| Roots of this problem go way back. | Nathan Monson | 2011/03/15 09:17 AM |
| Roots of this problem go way back. | mpx | 2011/03/15 12:55 PM |
| Roots of this problem go way back. | Mark Roulo | 2011/03/15 02:34 PM |
| Roots of this problem go way back. | Rob Thorpe | 2011/03/15 04:42 PM |
| Roots of this problem go way back. | Paul | 2011/03/15 05:03 PM |
| Roots of this problem go way back. | Dean Kent | 2011/03/15 08:11 AM |
| Design Challenges at 22nm Article | Daniel Bizo | 2011/03/14 07:06 AM |
| Design Challenges at 22nm Article | Linus Torvalds | 2011/03/14 09:48 AM |
| Design Challenges at 22nm Article | David Kanter | 2011/03/14 09:20 PM |
| Design Challenges at 22nm Article | Dean Kent | 2011/03/15 08:16 AM |
| Design Challenges at 22nm Article | David Kanter | 2011/03/14 10:05 AM |
| Could you elaborate? | Daniel Bizó | 2011/03/16 06:43 AM |
| IDM trade offs | David Kanter | 2011/03/16 10:54 AM |
| Design Challenges at 22nm Article | Tianyi | 2012/10/18 12:24 AM |
