By: EduardoS (no.delete@this.spam.com), April 20, 2011 11:45 am
Room: Moderated Discussions
Moritz (better@not.tell) on 4/20/11 wrote:
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>>For example a conditional move is an instruction you can see from AMD's instruction
>>set they have in abundance, but how many of the 4 units can execute this?
>
>My understanding is that non of them can, conditionals or branching is not done by the execution-units.
All of them, conditional move is different from branching, and preferred over branching for AMD hardware.
---------------------------
>>For example a conditional move is an instruction you can see from AMD's instruction
>>set they have in abundance, but how many of the 4 units can execute this?
>
>My understanding is that non of them can, conditionals or branching is not done by the execution-units.
All of them, conditional move is different from branching, and preferred over branching for AMD hardware.
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gpgpu and core counts | Vincent Diepeveen | 2011/04/20 05:52 AM |
gpgpu and core counts | none | 2011/04/20 07:05 AM |
gpgpu and core counts | EduardoS | 2011/04/20 11:36 AM |
gpgpu and core counts | Heikki Kultala | 2011/04/20 10:16 AM |
gpgpu and core counts | EduardoS | 2011/04/20 11:34 AM |
gpgpu and core counts | Heikki Kultala | 2011/04/20 07:24 PM |
gpgpu and core counts | EduardoS | 2011/04/20 08:55 PM |
gpgpu and core counts | Heikki Kultala | 2011/04/21 06:48 AM |
gpgpu and core counts | EduardoS | 2011/04/22 01:41 PM |
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AMD Compute and Texture Fetch | Vincent Diepeveen | 2011/04/22 01:14 AM |
AMD Compute and Texture Fetch | David Kanter | 2011/04/22 10:53 AM |
AMD Compute and Texture Fetch | EduardoS | 2011/04/22 01:46 PM |
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