By: Nicolas Capens (nicolas.capens.delete@this.gmail.com), August 14, 2011 10:51 pm
Room: Moderated Discussions
Hi Robert,
Robert David Graham (bigrobg@gmail.com) on 8/12/11 wrote:
---------------------------
>>Anyway, to answer your questions, you'll need to be a bit
>>more specific.
>
>How many 32-bit integer additions per clock?
>
>[...]
>
>The reason I ask is that a lot of integer applications can be re-written as SIMD
>integer applications. This can be crypto on servers, password cracking, bitcoin
>mining, pattern searching, SAT-solvers, and so on.
>
>These applications are a mix of integer operations: addition, subjection, xor,
>and, or, not, shift, rotate. But not so much multiple or divide. There is also a lot of shuffling and conditional loads.
This is also a strong point of AVX2. It extends all integer SIMD operations to 256-bit, supports vector-vector shifts, various shuffle operations, and gather. This means practically every scalar operation gets a vector equivalent, making it straightforward to parallelize loops with independent iterations: http://software.intel.com/en-us/blogs/2011/06/13/haswell-new-instruction-descriptions-now-available/
So the CPU cores will be more powerful than the IGP at generic computing.
Cheers,
Nicolas
Robert David Graham (bigrobg@gmail.com) on 8/12/11 wrote:
---------------------------
>>Anyway, to answer your questions, you'll need to be a bit
>>more specific.
>
>How many 32-bit integer additions per clock?
>
>[...]
>
>The reason I ask is that a lot of integer applications can be re-written as SIMD
>integer applications. This can be crypto on servers, password cracking, bitcoin
>mining, pattern searching, SAT-solvers, and so on.
>
>These applications are a mix of integer operations: addition, subjection, xor,
>and, or, not, shift, rotate. But not so much multiple or divide. There is also a lot of shuffling and conditional loads.
This is also a strong point of AVX2. It extends all integer SIMD operations to 256-bit, supports vector-vector shifts, various shuffle operations, and gather. This means practically every scalar operation gets a vector equivalent, making it straightforward to parallelize loops with independent iterations: http://software.intel.com/en-us/blogs/2011/06/13/haswell-new-instruction-descriptions-now-available/
So the CPU cores will be more powerful than the IGP at generic computing.
Cheers,
Nicolas