Article: AMD's Mobile Strategy
By: Wilco (Wilco.Dijkstra.delete@this.ntlworld.com), December 15, 2011 7:46 am
Room: Moderated Discussions
Daniel Bizo (fejenagy@gmail.com) on 12/15/11 wrote:
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>Mark Pillsbury (no_spam@gmail.com) on 12/14/11 wrote:
>---------------------------
>>I liked your thoughtful analysis but I respectfully disagree with your opinion that
>>"From a technical perspective, adopting ARM for SoCs makes little sense. It utterly
>>eliminates one of AMD's core competencies, namely their x86 expertise." I think
>>ARM is a better technical solution for tablets and netbooks/ultrabooks/notebooks
>>because power consumption is critical in these markets. A successful company has
>>to provide what the market needs even if it is not the sweet spot of their core
>>competency. Otherwise, it is like being the guy who drops his keys in a dark parking
>>lot and looks for them under a light instead of where he dropped them.
>
>There are folks here at RWT who know and can explain this stuff a lot better than
>me, including David, but the bottom line is that in real life, energy efficiency
>and power consumption has very little to do with the instruction set architecture.
>This is because over the last decade the microarchitectural complexity AND integration
>level of microchips increased in such a big way that the impact of the ISA on device power and efficiency is marginal.
I disagree. The impact on the high-end is smaller nowadays, eventhough it remains non-trivial. Nobody would claim that 4-way x86 decode is easy! It has taken a very long time for x86 to get there, when 3rd generation OoO ARM is already going to be 4-way.
However at the low end, the x86-penalty is very significant, and this will remain so despite increasing complexity and cheaper transistors. The hard fact is that you need more transistors to implement an x86 core to get equivalent performance, and that means higher power consumption.
>Even if ARM had any advantages over x86 due to its RISC type ISA that enables a
>cleaner, simpler and more efficient front-end design, architectural design choices,
>resources on implementation, and available process technology are all much bigger
>factors on their own, not to speak combined.
If that is the case then why is an Atom core more than double the size of a Cortex-A9 (could be quadruple, I can't find my old post on this), and ends up slower clock for clock, despite Intel's process advantage?
Bobcat is even larger of course, but at least it does beat the A9, although it needs significantly more power than Atom to get there. In this case the processes used are the same as for ARM SoCs.
So unless we assume both Intel and AMD are totally incompetent in low power design, the main difference is the ISA.
Wilco
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>Mark Pillsbury (no_spam@gmail.com) on 12/14/11 wrote:
>---------------------------
>>I liked your thoughtful analysis but I respectfully disagree with your opinion that
>>"From a technical perspective, adopting ARM for SoCs makes little sense. It utterly
>>eliminates one of AMD's core competencies, namely their x86 expertise." I think
>>ARM is a better technical solution for tablets and netbooks/ultrabooks/notebooks
>>because power consumption is critical in these markets. A successful company has
>>to provide what the market needs even if it is not the sweet spot of their core
>>competency. Otherwise, it is like being the guy who drops his keys in a dark parking
>>lot and looks for them under a light instead of where he dropped them.
>
>There are folks here at RWT who know and can explain this stuff a lot better than
>me, including David, but the bottom line is that in real life, energy efficiency
>and power consumption has very little to do with the instruction set architecture.
>This is because over the last decade the microarchitectural complexity AND integration
>level of microchips increased in such a big way that the impact of the ISA on device power and efficiency is marginal.
I disagree. The impact on the high-end is smaller nowadays, eventhough it remains non-trivial. Nobody would claim that 4-way x86 decode is easy! It has taken a very long time for x86 to get there, when 3rd generation OoO ARM is already going to be 4-way.
However at the low end, the x86-penalty is very significant, and this will remain so despite increasing complexity and cheaper transistors. The hard fact is that you need more transistors to implement an x86 core to get equivalent performance, and that means higher power consumption.
>Even if ARM had any advantages over x86 due to its RISC type ISA that enables a
>cleaner, simpler and more efficient front-end design, architectural design choices,
>resources on implementation, and available process technology are all much bigger
>factors on their own, not to speak combined.
If that is the case then why is an Atom core more than double the size of a Cortex-A9 (could be quadruple, I can't find my old post on this), and ends up slower clock for clock, despite Intel's process advantage?
Bobcat is even larger of course, but at least it does beat the A9, although it needs significantly more power than Atom to get there. In this case the processes used are the same as for ARM SoCs.
So unless we assume both Intel and AMD are totally incompetent in low power design, the main difference is the ISA.
Wilco