Article: AMD's Mobile Strategy
By: Michael S (already5chosen.delete@this.yahoo.com), December 17, 2011 1:05 pm
Room: Moderated Discussions
anon (anon@anon.com) on 12/17/11 wrote:
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>David Kanter (dkanter@realworldtech.com) on 12/15/11 wrote:
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>>6. ARMv8-A has more robust conditionals.
>
>How do you figure this so? What do you mean by robust conditionals?
>
Probably David just meant to say that conditionals are available for wider range of instructions? Yes, I don't like "more robust" wording, too, it smells marketspeak.
>I don't think there is evidence for this point.
>
ARMv8 Technology Preview preview says:
Far fewer conditional instructions than in AArch32
* Conditional {branches, compares, selects}
Assuming that branches are the same as x86 branches and selects are the same as x86 conditional moves we are still left with conditional compares which are available in ARMv8, but not on x86.
Conditional compares appear to map well into evaluation of complex boolean expressions in branchless manner and as such should be useful in real-world compiled code.
x86 also have SETcc, but, taking into account ARM's traditionally strong support for immediate, I'd think that conditional select should be capable to emulate those as well, and probably even do a step or two better. x86 SETxx is, actually, rather poorly defined, in two aspects:
1) 8-bit destination register. 32/64 bits would be better.
2) sets to value of (0 | 1), when (0 |-1) is generally more useful.
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>David Kanter (dkanter@realworldtech.com) on 12/15/11 wrote:
>---------------------------
>>
>>6. ARMv8-A has more robust conditionals.
>
>How do you figure this so? What do you mean by robust conditionals?
>
Probably David just meant to say that conditionals are available for wider range of instructions? Yes, I don't like "more robust" wording, too, it smells marketspeak.
>I don't think there is evidence for this point.
>
ARMv8 Technology Preview preview says:
Far fewer conditional instructions than in AArch32
* Conditional {branches, compares, selects}
Assuming that branches are the same as x86 branches and selects are the same as x86 conditional moves we are still left with conditional compares which are available in ARMv8, but not on x86.
Conditional compares appear to map well into evaluation of complex boolean expressions in branchless manner and as such should be useful in real-world compiled code.
x86 also have SETcc, but, taking into account ARM's traditionally strong support for immediate, I'd think that conditional select should be capable to emulate those as well, and probably even do a step or two better. x86 SETxx is, actually, rather poorly defined, in two aspects:
1) 8-bit destination register. 32/64 bits would be better.
2) sets to value of (0 | 1), when (0 |-1) is generally more useful.
