Wilco (Wilco.Dijkstra@ntlworld.com) on 12/17/11 wrote:
---------------------------
>Linus Torvalds (torvalds@linux-foundation.org) on 12/16/11 wrote:
>---------------------------
>
>>Here is, for comparison,
>>a rather interesting POWER comparison with a more modern
>>Intel CPU (Woodcrest), which shows very close to 1.0:
>>
>>http://lca.ece.utexas.edu/pubs/spec09_ciji.pdf
>>>
>>
>>which is also interesting because their pathlengths are
>>actually very comparable with POWER. It is possible (in
>>fact likely) that at least part of that is simply
>>differences in compilers too, of course.
>
>Very interesting paper indeed! So POWER and x86 have the same instruction counts
>on average across Spec when going all out for performance. It's even more compelling
>due to using very different compilers, so you can't blame >it on using identical code generation strategies.

>I can certainly try to get numbers to confirm this for ARM >as well, but I think
>the paper says it all: RISC and CISC nowadays have very >similar instruction complexity
>- in part because CISCs stopped using complex instructions >and RISC instructions became more complex.

Did you even read that paper? That's not even remotely what it says. First, they were using 64-bit mode for some of the benchmarks, which disables a number of optimizations.

Second, if you look at GCC, nearly 30% of the instructions are 'complex' (i.e. using uop fusion or macro-op fusion). The integer average is 20%. On top of that the ESP tracker seems to yield around a 5-6% benefit for the more complex integer benchmarks.

>So can we now agree 1 ARM decoder = 1 x86 decoder?

Again, did you even read that paper?

David