Article: AMD's Mobile Strategy
By: EduardoS (no.delete@this.spam.com), December 20, 2011 6:40 pm
Room: Moderated Discussions
Exophase (exophase@gmail.com) on 12/20/11 wrote:
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>So about 9.3% of instructions use inlined shifts. This number is however inflated
>since it counts mov as an ALU instruction, so all shifts are included. But in my
>experience shifts can be folded more often than not.
Very good data!
About the amount of shift, crossing this with the previous x86 data it looks all most of those shift are used to calculate address, wich is embedded in x86 instructions.
Also, there is a a lot of immediates, including big immediates, I can't imagine how so many immediates are being used, specially the big ones, but apparently most of the big immediates follows a pattern that can be represented by a few bits, I wonder how is this pattern...
---------------------------
>So about 9.3% of instructions use inlined shifts. This number is however inflated
>since it counts mov as an ALU instruction, so all shifts are included. But in my
>experience shifts can be folded more often than not.
Very good data!
About the amount of shift, crossing this with the previous x86 data it looks all most of those shift are used to calculate address, wich is embedded in x86 instructions.
Also, there is a a lot of immediates, including big immediates, I can't imagine how so many immediates are being used, specially the big ones, but apparently most of the big immediates follows a pattern that can be represented by a few bits, I wonder how is this pattern...
