EduardoS (no@spam.com) on 12/20/11 wrote:
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>About the amount of shift, crossing this with the previous x86 data it looks all
>most of those shift are used to calculate address, wich is embedded in x86 instructions.

This is absolutely not true. ARM is not MIPS, SPARC, or Alpha.

ARM loads/stores allow as part of their addressing a left or (logical or arithmetic) right shift or a rotate by any immediate value, where x86 only allows left shift by 0, 1, 2, or 3. I've used lsl > 3 to some extent, and have even used lsr and maybe even ror once or twice, but I don't think they're really that useful and are clearly just included to simplify decoding/execution by keeping a similar format to integer shifts.

ARM64 reduces this down to just left shift by 0-4 (so a minor improvement over x86 by having the 128-bit case). I think they made the right move with this.

>Also, there is a a lot of immediates, including big immediates, I can't imagine
>how so many immediates are being used, specially the big ones, but apparently most
>of the big immediates follows a pattern that can be represented by a few bits, I wonder how is this pattern...
>

You and Linus really should try to find some hard data for the prevalence of large immediates. In my experience they show up most in bit-masks, and are occasionally mitigated by ARM's base + rotate immediate format. ARM64 trades this for larger ADD/SUB immediates and a special bit-mask format for logical operations. Beyond that, having more registers will help in allowing large immediates to be cached over the duration of loops.