Article: AMD's Mobile Strategy
By: Michael S (already5chosen.delete@this.yahoo.com), December 23, 2011 12:15 am
Room: Moderated Discussions
David Kanter (dkanter@realworldtech.com) on 12/23/11 wrote:
---------------------------
>>This generation Intel went crazy with market segmentation feature fusing. I understand
>>how it works and why it works in general and I'm not arguing against performing
>>any feature removal or underclocking or whatever to make other parts look better
>>and sell for more. But some of the decisions seem pulled from a hat. Fusing off
>>instruction sets that are not special purpose is a bad idea because it discourages
>>adoption which is needed to make the instruction set useful.
>>
>>Processors like Pentium and even Celeron are higher margin than processors like
>>Atom - or at least Atom's going to have to become lower margin to survive. So long
>>as Intel sees AVX as only being worthy of paying highest margin for I can't see
>>them putting it in its lowest margin chips. Won't people >wonder why Atoms have it if Pentiums don't?
>
>I don't know of any processors with AVX hardware that do not have it enabled. Could you point those out?
>
>The examples I found were all Westmere/Nehalem/Penryn/Atom based. I do not know of any SNB derivatives without AVX.
>
>David
http://ark.intel.com/products/series/55771
http://ark.intel.com/products/series/53255
http://ark.intel.com/products/series/53254
http://ark.intel.com/products/series/55655
http://ark.intel.com/products/series/55656
Probably more.
Looks like all SandyB processors branded as Celeron or Pentium has both AVX and AES fused off.
---------------------------
>>This generation Intel went crazy with market segmentation feature fusing. I understand
>>how it works and why it works in general and I'm not arguing against performing
>>any feature removal or underclocking or whatever to make other parts look better
>>and sell for more. But some of the decisions seem pulled from a hat. Fusing off
>>instruction sets that are not special purpose is a bad idea because it discourages
>>adoption which is needed to make the instruction set useful.
>>
>>Processors like Pentium and even Celeron are higher margin than processors like
>>Atom - or at least Atom's going to have to become lower margin to survive. So long
>>as Intel sees AVX as only being worthy of paying highest margin for I can't see
>>them putting it in its lowest margin chips. Won't people >wonder why Atoms have it if Pentiums don't?
>
>I don't know of any processors with AVX hardware that do not have it enabled. Could you point those out?
>
>The examples I found were all Westmere/Nehalem/Penryn/Atom based. I do not know of any SNB derivatives without AVX.
>
>David
http://ark.intel.com/products/series/55771
http://ark.intel.com/products/series/53255
http://ark.intel.com/products/series/53254
http://ark.intel.com/products/series/55655
http://ark.intel.com/products/series/55656
Probably more.
Looks like all SandyB processors branded as Celeron or Pentium has both AVX and AES fused off.