Article: AMD's Mobile Strategy
By: anon (anon.delete@this.anon.com), December 21, 2011 9:20 pm
Room: Moderated Discussions
Wilco (Wilco.Dijkstra@ntlworld.com) on 12/21/11 wrote:
---------------------------
>Exophase (exophase@gmail.com) on 12/21/11 wrote:
>---------------------------
>>stubar (nothanks@gmail.com) on 12/21/11 wrote:
>>---------------------------
>>>I've always done small to large. Is there a technical reason for large to small?
>>
>>If you go large to small you're guaranteed to stay aligned without padding.
>
>You still get the same amount of tail padding.
>
>Wilco
That is a pretty archaic way to lay out a data structure. It should be grouped according to cache line access locality, type, and of false sharing with other CPUs, etc. Unless you're not using caches or something crazy.
---------------------------
>Exophase (exophase@gmail.com) on 12/21/11 wrote:
>---------------------------
>>stubar (nothanks@gmail.com) on 12/21/11 wrote:
>>---------------------------
>>>I've always done small to large. Is there a technical reason for large to small?
>>
>>If you go large to small you're guaranteed to stay aligned without padding.
>
>You still get the same amount of tail padding.
>
>Wilco
That is a pretty archaic way to lay out a data structure. It should be grouped according to cache line access locality, type, and of false sharing with other CPUs, etc. Unless you're not using caches or something crazy.
