Article: AMD's Mobile Strategy
By: anon (anon.delete@this.anon.com), December 22, 2011 6:11 am
Room: Moderated Discussions
Wilco (Wilco.Dijkstra@ntlworld.com) on 12/22/11 wrote:
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>anon (anon@anon.com) on 12/21/11 wrote:
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>>Wilco (Wilco.Dijkstra@ntlworld.com) on 12/21/11 wrote:
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>>>Exophase (exophase@gmail.com) on 12/21/11 wrote:
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>>>>stubar (nothanks@gmail.com) on 12/21/11 wrote:
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>>>>>I've always done small to large. Is there a technical reason for large to small?
>>>>
>>>>If you go large to small you're guaranteed to stay aligned without padding.
>>>
>>>You still get the same amount of tail padding.
>>>
>>>Wilco
>>
>>That is a pretty archaic way to lay out a data structure. It should be grouped
>>according to cache line access locality, type, and of false sharing with other CPUs,
>>etc. Unless you're not using caches or something crazy.
>
>Most structs are much smaller than a cache line. If you're thinking about big descriptors
>like used by OSes then you would indeed layout differently.
For structures where the cache effects are negligible, what is the point in arranging small to large? A 12 bit offset could address byte granularity within 4K, no?
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>anon (anon@anon.com) on 12/21/11 wrote:
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>>Wilco (Wilco.Dijkstra@ntlworld.com) on 12/21/11 wrote:
>>---------------------------
>>>Exophase (exophase@gmail.com) on 12/21/11 wrote:
>>>---------------------------
>>>>stubar (nothanks@gmail.com) on 12/21/11 wrote:
>>>>---------------------------
>>>>>I've always done small to large. Is there a technical reason for large to small?
>>>>
>>>>If you go large to small you're guaranteed to stay aligned without padding.
>>>
>>>You still get the same amount of tail padding.
>>>
>>>Wilco
>>
>>That is a pretty archaic way to lay out a data structure. It should be grouped
>>according to cache line access locality, type, and of false sharing with other CPUs,
>>etc. Unless you're not using caches or something crazy.
>
>Most structs are much smaller than a cache line. If you're thinking about big descriptors
>like used by OSes then you would indeed layout differently.
For structures where the cache effects are negligible, what is the point in arranging small to large? A 12 bit offset could address byte granularity within 4K, no?