Article: AMD's Mobile Strategy
By: Kira (kirsc.delete@this.aeterna.ru), December 18, 2011 9:00 pm
Room: Moderated Discussions
mpx (mpx@nomail.pl) on 12/18/11 wrote:
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>anon (anon@anon.com) on 12/17/11 wrote:
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>
>>I'm talking about the general-purpose compute core for high performance server/client workloads, of course.
>>
>>Even if you drop the client part of it, server is still far from EP, so SMT approach
>>is superior to lots of small cores, IMO.
>
>SMT is orthogonal to lots of small cores. You can have lots of small cores with
>SMT (Sparc T3) or low number of large cores without it (Phenom, Core i5 2500).
T3 (or T2, T1, or T4) didn't have SMT. It had a multithreading mechanism that involved a context-switch every cycle. SMT doesn't work on non-superscalar cores (T1-T3), and it doesn't work particularly well on barely-superscalar ones (T4) either.
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>anon (anon@anon.com) on 12/17/11 wrote:
>---------------------------
>
>>I'm talking about the general-purpose compute core for high performance server/client workloads, of course.
>>
>>Even if you drop the client part of it, server is still far from EP, so SMT approach
>>is superior to lots of small cores, IMO.
>
>SMT is orthogonal to lots of small cores. You can have lots of small cores with
>SMT (Sparc T3) or low number of large cores without it (Phenom, Core i5 2500).
T3 (or T2, T1, or T4) didn't have SMT. It had a multithreading mechanism that involved a context-switch every cycle. SMT doesn't work on non-superscalar cores (T1-T3), and it doesn't work particularly well on barely-superscalar ones (T4) either.
