Article: AMD's Mobile Strategy
By: Mark Roulo (nothanks.delete@this.xxx.com), January 9, 2012 9:43 am
Room: Moderated Discussions
David Kanter (dkanter@realworldtech.com) on 1/6/12 wrote:
---------------------------
>Silicon interposers are generally not used for active circuits, to avoid problems
>with the TSVs. People definitely contemplate using the area for passives, but if
>you want transistors...then it's full 3D, not an interposer.
>
>Of course, the whole point of an interposer is to avoid any yield issues related
>to TSVs being near to transistors and to simplify testing.
>
The Xilinx Virtex-7 uses one of these passive interposer thingies to connect different dies filled with FPGA logic. Why would this not work to connect a CPU die with a DRAM?
---------------------------
>Silicon interposers are generally not used for active circuits, to avoid problems
>with the TSVs. People definitely contemplate using the area for passives, but if
>you want transistors...then it's full 3D, not an interposer.
>
>Of course, the whole point of an interposer is to avoid any yield issues related
>to TSVs being near to transistors and to simplify testing.
>
The Xilinx Virtex-7 uses one of these passive interposer thingies to connect different dies filled with FPGA logic. Why would this not work to connect a CPU die with a DRAM?
